Re: [Qemu-devel] [PATCH 4/3] wakeup: only reset the CPU

[Peter Stuge]

Paolo Bonzini wrote:
> > That is: perhaps it's a *SeaBIOS* bug that suspend/resume doesn't
> > work if the PAM configuration is reset?
> 
> Yeah, it sounded a bit weird when I wrote that commit message. 
> This could be the case.  How does it work on Coreboot?

Yes all hardware except RAM in self-refresh and registers explicitly
hooked to battery sleep power rail has reset state on resume from S3.
Those registers seem to grow over time, the i440 probably doesn't
have very many. The memory controller configuration would be stored
there.

Power on and resume are identical except for memory controller init
and what should happen once init is finished.

On power on jump to payload.

On resume jump to S3 resume vector set by OSPM.

This is another case where coreboot has infrastructure since a long
time, which can be used by hypervisors. Please don't replicate that
into SeaBIOS. In the end you will have what is essentially a fork of
coreboot, which seems like a tremendous waste of effort.

See if there is a 440 board in coreboot where suspend works. If yes,
then making that work for the QEMU board should take only moderate
effort.


//Peter