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[Qemu-devel] Trouble with adding TCG branch instructions
From: |
Soumyadeep Ghosh |
Subject: |
[Qemu-devel] Trouble with adding TCG branch instructions |
Date: |
Fri, 15 Mar 2013 14:59:52 -0400 |
Hi,
I am trying to modify the translate.c file for ARM target to add some extra
operations for every add/subtract instruction in the target code. Following are
the main modifications I need to make:
1. Added new registers to CPUArmState and added corresponding TCG registers
(already done)
2. For every add/subtract, compare the values of the operands, and store the
greater operand in one of the newly added registers.
For 2, I have added the following sequence of code (with my interpretation of
the code I have written as comments):
int label_rn = gen_new_label();
int label_done = gen_new_label();
tcg_gen_brcond_tl (TCG_cond_LT, tmp2, tmp, label_rn); // If tmp2 <
tmp, branch to label_rn
store_reg (s, 20, tmp2);
// Store tmp2 in one of the newly added registers
tcg_gen_br (label_done);
// Branch to end
gen_set_label (label_rn);
// Set label_rn to the current code location
store_reg (s, 20, tmp);
// Store tmp in one of the newly added registers
gen_set_label (label_done);
// Set label_done to the current code location
// Rest of the program
When I try to emulate my ARM program using the compiled version of the modified
emulator, I get an error (Uncaught signal 11). Debugging with gdb tells me that
the following assertion on line 1885 of tcg/tcg.c (the function
tcg_reg_alloc_op) raises the signal:
assert (ts->val_type == TEMP_VAL_REG);
Does anyone have any insight into what is causing the problem?
Thanks in advance for any inputs,
Deep
- [Qemu-devel] Trouble with adding TCG branch instructions,
Soumyadeep Ghosh <=