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[Qemu-devel] [PATCH v4 12/33] tcg-ppc64: Allow constant first argument t
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 12/33] tcg-ppc64: Allow constant first argument to sub |
Date: |
Thu, 4 Apr 2013 17:56:05 -0500 |
Using SUBFIC for 16-bit signed constants.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ppc64/tcg-target.c | 21 +++++++++++++++++----
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 384946b..4da969f 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -329,6 +329,7 @@ static int tcg_target_const_match (tcg_target_long val,
#define MULLI OPCD( 7)
#define CMPLI OPCD( 10)
#define CMPI OPCD( 11)
+#define SUBFIC OPCD( 8)
#define LWZU OPCD( 33)
#define STWU OPCD( 37)
@@ -1314,7 +1315,13 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
const TCGArg *args,
break;
case INDEX_op_sub_i32:
a0 = args[0], a1 = args[1], a2 = args[2];
- if (const_args[2]) {
+ if (const_args[1]) {
+ if (const_args[2]) {
+ tcg_out_movi(s, TCG_TYPE_I32, a0, a1 - a2);
+ } else {
+ tcg_out32(s, SUBFIC | TAI(a0, a2, a1));
+ }
+ } else if (const_args[2]) {
a2 = -a2;
goto do_addi_32;
} else {
@@ -1483,7 +1490,13 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc,
const TCGArg *args,
break;
case INDEX_op_sub_i64:
a0 = args[0], a1 = args[1], a2 = args[2];
- if (const_args[2]) {
+ if (const_args[1]) {
+ if (const_args[2]) {
+ tcg_out_movi(s, TCG_TYPE_I64, a0, a1 - a2);
+ } else {
+ tcg_out32(s, SUBFIC | TAI(a0, a2, a1));
+ }
+ } else if (const_args[2]) {
a2 = -a2;
goto do_addi_64;
} else {
@@ -1639,7 +1652,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_divu_i32, { "r", "r", "r" } },
{ INDEX_op_rem_i32, { "r", "r", "r" } },
{ INDEX_op_remu_i32, { "r", "r", "r" } },
- { INDEX_op_sub_i32, { "r", "r", "ri" } },
+ { INDEX_op_sub_i32, { "r", "rI", "ri" } },
{ INDEX_op_and_i32, { "r", "r", "ri" } },
{ INDEX_op_or_i32, { "r", "r", "ri" } },
{ INDEX_op_xor_i32, { "r", "r", "ri" } },
@@ -1655,7 +1668,7 @@ static const TCGTargetOpDef ppc_op_defs[] = {
{ INDEX_op_not_i32, { "r", "r" } },
{ INDEX_op_add_i64, { "r", "r", "rT" } },
- { INDEX_op_sub_i64, { "r", "r", "rT" } },
+ { INDEX_op_sub_i64, { "r", "rI", "rT" } },
{ INDEX_op_and_i64, { "r", "r", "rU" } },
{ INDEX_op_or_i64, { "r", "r", "rU" } },
{ INDEX_op_xor_i64, { "r", "r", "rU" } },
--
1.8.1.4
- [Qemu-devel] [PATCH v4 03/33] tcg-ppc64: Introduce and use tcg_out_rlw, (continued)
- [Qemu-devel] [PATCH v4 03/33] tcg-ppc64: Introduce and use tcg_out_rlw, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 04/33] tcg-ppc64: Introduce and use tcg_out_ext32u, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 02/33] tcg-ppc64: Use TCGReg everywhere, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 06/33] tcg-ppc64: Introduce and use tcg_out_shri64, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 08/33] tcg-ppc64: Fix setcond_i32, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 05/33] tcg-ppc64: Introduce and use tcg_out_shli64, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 09/33] tcg-ppc64: Cleanup tcg_out_movi, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 10/33] tcg-ppc64: Rearrange integer constant constraints, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 07/33] tcg-ppc64: Introduce and use TAI and SAI, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 12/33] tcg-ppc64: Allow constant first argument to sub,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 13/33] tcg-ppc64: Tidy or and xor patterns., Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 14/33] tcg-ppc64: Improve and_i32 with constant, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 11/33] tcg-ppc64: Improve constant add and sub ops., Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 15/33] tcg-ppc64: Improve and_i64 with constant, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 16/33] tcg-ppc64: Use automatic implementation of ext32u_i64, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 17/33] tcg-ppc64: Streamline qemu_ld/st insn selection, Richard Henderson, 2013/04/04