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[Qemu-devel] [PATCH v4 30/33] tcg-ppc64: Use getauxval for ISA detection
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v4 30/33] tcg-ppc64: Use getauxval for ISA detection |
Date: |
Thu, 4 Apr 2013 17:56:23 -0500 |
Glibc 2.16 includes an easy way to get feature bits previously
buried in /proc or the program startup auxiliary vector. Use it.
Signed-off-by: Richard Henderson <address@hidden>
---
configure | 18 ++++++++++++++++++
tcg/ppc64/tcg-target.c | 16 +++++++++++++++-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index d685275..40c3538 100755
--- a/configure
+++ b/configure
@@ -3252,6 +3252,20 @@ if compile_prog "" "" ; then
int128=yes
fi
+########################################
+# check if getauxval is available.
+
+getauxval=no
+cat > $TMPC << EOF
+#include <sys/auxv.h>
+int main(void) {
+ return getauxval(AT_HWCAP) == 0;
+}
+EOF
+if compile_prog "" "" ; then
+ getauxval=yes
+fi
+
##########################################
# End of CC checks
# After here, no more $cc or $ld runs
@@ -3809,6 +3823,10 @@ if test "$int128" = "yes" ; then
echo "CONFIG_INT128=y" >> $config_host_mak
fi
+if test "$getauxval" = "yes" ; then
+ echo "CONFIG_GETAUXVAL=y" >> $config_host_mak
+fi
+
if test "$glusterfs" = "yes" ; then
echo "CONFIG_GLUSTERFS=y" >> $config_host_mak
fi
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index faf110f..6dec600 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -44,8 +44,15 @@ static uint8_t *tb_ret_addr;
#define GUEST_BASE 0
#endif
+#ifdef CONFIG_GETAUXVAL
+#include <sys/auxv.h>
+static bool have_isa_2_06;
+#define HAVE_ISA_2_06 have_isa_2_06
+#define HAVE_ISEL have_isa_2_06
+#else
#define HAVE_ISA_2_06 0
-#define HAVE_ISEL 0
+#define HAVE_ISA_ISEL 0
+#endif
#ifdef CONFIG_USE_GUEST_BASE
#define TCG_GUEST_BASE_REG 30
@@ -2059,6 +2066,13 @@ static const TCGTargetOpDef ppc_op_defs[] = {
static void tcg_target_init (TCGContext *s)
{
+#ifdef CONFIG_GETAUXVAL
+ unsigned long hwcap = getauxval(AT_HWCAP);
+ if (hwcap & PPC_FEATURE_ARCH_2_06) {
+ have_isa_2_06 = true;
+ }
+#endif
+
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
tcg_regset_set32 (tcg_target_call_clobber_regs, 0,
--
1.8.1.4
- [Qemu-devel] [PATCH v4 23/33] tcg-ppc64: Implement deposit, (continued)
- [Qemu-devel] [PATCH v4 23/33] tcg-ppc64: Implement deposit, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 22/33] tcg-ppc64: Handle constant inputs for some compound logicals, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 24/33] tcg-ppc64: Use I constraint for mul, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 25/33] tcg-ppc64: Cleanup i32 constants to tcg_out_cmp, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 26/33] tcg-ppc64: Use TCGType throughout compares, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 27/33] tcg-ppc64: Use MFOCRF instead of MFCR, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 28/33] tcg-ppc64: Use ISEL for setcond, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 30/33] tcg-ppc64: Use getauxval for ISA detection,
Richard Henderson <=
- [Qemu-devel] [PATCH v4 31/33] tcg-ppc64: Implement add2/sub2_i64, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 29/33] tcg-ppc64: Implement movcond, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 32/33] tcg-ppc64: Implement mulu2/muls2_i64, Richard Henderson, 2013/04/04
- [Qemu-devel] [PATCH v4 33/33] tcg-ppc64: Handle deposit of zero, Richard Henderson, 2013/04/04
- Re: [Qemu-devel] [PATCH v4 00/33] Modernize tcg/ppc64, Aurelien Jarno, 2013/04/13