Re: [Qemu-devel] [PATCH] ARM Cortex A9 Global Timer

[Peter Maydell]

On 16 April 2013 13:09, François Legal <address@hidden> wrote:

Ugh. Your mail client has completely mangled things (it's
run all the lines of code into each other and it's still
posting as multipart text+HTML). Please could you look at
fixing its configuration -- it makes it hard to reply in
response to individual things you've said.

Anyway, you may be right about needing multiple qemutimers,
I think I misunderstood that part. We set up one timer
for each comparator, right? (ie it fires when the comparator
would fire). In that case I think that is correct.

You might like to try having each gTimerBlock have an
ARMMPGTimerState* field, so you get at the non-banked
parts of the control register with 'gtb->gtimer.gtimer_control'
rather than via an anonymous uint32_t*. I think that would
be clearer.

Regarding gdb access to memory mapped registers causing a crash
due to NULL cpu_single_env -- I think this is a general issue with
the gdb support code. I suggest you drop those parts of your
patch for now; we should look at fixing it in a coherent way
separately and later (eg by having gdb memory accesses always look
as if they are from CPU 0, or something).

PS: I didn't mention it, but the struct names and so on
should also change in line with my suggested new device
name/filename.

thanks
-- PMM