Re: [Qemu-devel] [PATCH 03/15] acpi_piix4: add infrastructure to send CPU hot-plug GPE to guest

[Andreas Färber]

Am 25.04.2013 16:05, schrieb Igor Mammedov:
> * introduce processor status bitmask visible to guest at 0xaf00 addr,
>   where ACPI asl code expects it
> * set bit corresponding to APIC ID in processor status bitmask on
>   receiving CPU hot-plug notification
> * trigger CPU hot-plug SCI, to notify guest about CPU hot-plug event
> 
> Signed-off-by: Igor Mammedov <address@hidden>
> ---
> Note:
>   gpe_cpu.sts isn't need to be migrated, since CPU hotpluging during
>   migration just doesn't work, since destination QEMU has to be started
>   with all present in guest CPUs (including hotplugged).
>   i.e. src-qemu -smp 2,max-cpus=4; cpu-add id=2; dst-qemu -smp 3,max-cpus=4
>   Destination QEMU will recreate the same gpe_cpu.sts=t'111' bitmap as
>   on source by calling qemu_for_each_cpu(piix4_init_cpu_status, &s->gpe_cpu);
>   since it has been started with 3 CPUs on command line.
> 
> v7:
>   * s/struct cpu_status/struct CPUStatus/
> v6:
>   * drop gpe_cpu.sts migration hunks
> v5:
>   * add optional vmstate subsection if there was CPU hotplug event
>   * remove unused Error*
>   * use qemu_for_each_cpu() instead of recursion over QOM tree
> v4:
>   * added spec for QEMU-Seabios interface
>   * added PIIX4_ prefix to PROC_ defines
> v3:
>   * s/get_firmware_id()/get_arch_id()/ due rebase
>   * s/cpu_add_notifier/cpu_added_notifier/
> v2:
>   * use CPUClass.get_firmware_id() to make code target independent
>   * bump up vmstate_acpi version
> ---
>  docs/specs/acpi_cpu_hotplug.txt |   22 +++++++++
>  hw/acpi/piix4.c                 |   90 
> ++++++++++++++++++++++++++++++++++++++-
>  2 files changed, 110 insertions(+), 2 deletions(-)
>  create mode 100644 docs/specs/acpi_cpu_hotplug.txt

Thanks, since it no longer depends on migration discussions, applied to
qom-cpu (with changes below: struct typedef and symmetric read/write):

https://github.com/afaerber/qemu-cpu/commits/qom-cpu

Andreas

diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index ebd1af9..c4af1cc 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -59,9 +59,9 @@ struct pci_status {
     uint32_t down;
 };

-struct CPUStatus {
+typedef struct CPUStatus {
     uint8_t sts[PIIX4_PROC_LEN];
-};
+} CPUStatus;

 typedef struct PIIX4PMState {
     PCIDevice dev;
@@ -92,7 +92,7 @@ typedef struct PIIX4PMState {
     uint8_t disable_s4;
     uint8_t s4_val;

-    struct CPUStatus gpe_cpu;
+    CPUStatus gpe_cpu;
     Notifier cpu_added_notifier;
 } PIIX4PMState;

@@ -597,10 +597,10 @@ static const MemoryRegionOps piix4_pci_ops = {
     },
 };

-static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned width)
+static uint64_t cpu_status_read(void *opaque, hwaddr addr, unsigned int
size)
 {
     PIIX4PMState *s = opaque;
-    struct CPUStatus *cpus = &s->gpe_cpu;
+    CPUStatus *cpus = &s->gpe_cpu;
     uint64_t val = cpus->sts[addr];

     return val;
@@ -630,7 +630,7 @@ typedef enum {
 static void piix4_cpu_hotplug_req(PIIX4PMState *s, CPUState *cpu,
                                   HotplugEventType action)
 {
-    struct CPUStatus *g = &s->gpe_cpu;
+    CPUStatus *g = &s->gpe_cpu;
     ACPIGPE *gpe = &s->ar.gpe;
     CPUClass *k = CPU_GET_CLASS(cpu);
     int64_t cpu_id;
@@ -656,7 +656,7 @@ static void piix4_cpu_added_req(Notifier *n, void
*opaque)

 static void piix4_init_cpu_status(CPUState *cpu, void *data)
 {
-    struct CPUStatus *g = (struct CPUStatus *)data;
+    CPUStatus *g = (CPUStatus *)data;
     CPUClass *k = CPU_GET_CLASS(cpu);
     int64_t id = k->get_arch_id(cpu);



-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg