Re: [Qemu-devel] [PATCH v2 02/12] ARM: Prepare translation for AArch64 code

[John Rigby]

On Wed, May 1, 2013 at 4:33 AM, Peter Maydell <address@hidden> wrote:

On 1 May 2013 11:19, Laurent Desnogues <address@hidden> wrote:
> On Wednesday, May 1, 2013, Richard Henderson <address@hidden> wrote:
>> On 2013-04-30 07:36, John Rigby wrote:
>>>
>>>       uint32_t regs[16];
>>> +
>>> +    /* Regs for A64 mode.  */
>>> +    uint64_t xregs[31];
>>> +    uint64_t pc;
>>> +    uint64_t sp;
>>> +    uint32_t pstate;
>>> +    uint32_t aarch64_state; /* 1 if CPU is in aarch64 state */
>>> +
>>
>> How do these registers overlap (or not) in real hardware?
>> Is it possible to union these with the 32-bit state?
>
> There is an overlap between 32- and 64-bit state registers,
> but it's against the set of 32 (?) 32-bit registers that exist
> across all modes, not against the 16 registers as used here.
>
> IMHO it doesn't make sense to union them, the mapping
> can be done when switching from 32- to 64-bit modes.

Agreed -- the 32/64 switch only ever happens when taking
or returning from an exception, so it is easier to get
the overlap semantics right with explicit code there
rather than try to change all the existing 32 bit code
to implicitly get things right. Plus as you say the
interaction with aarch32 register banking would make
unioning tricky.

I think the other thing we need here is a comment stating exactly what

peter has said explaining why the two sets of registers exist and that the
aarch64 field indicates which set is active.

--john