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Re: [Qemu-devel] [PATCH 01/40] memory: assert that PhysPageEntry's ptr d


From: Paolo Bonzini
Subject: Re: [Qemu-devel] [PATCH 01/40] memory: assert that PhysPageEntry's ptr does not overflow
Date: Thu, 09 May 2013 18:46:51 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130311 Thunderbird/17.0.4

Il 09/05/2013 05:41, liu ping fan ha scritto:
> On Wed, May 8, 2013 at 12:08 AM, Paolo Bonzini <address@hidden> wrote:
>>
>>
>> ----- Messaggio originale -----
>>> Da: "Peter Maydell" <address@hidden>
>>> A: "Paolo Bonzini" <address@hidden>
>>> Cc: address@hidden, address@hidden, "jan kiszka" <address@hidden>, 
>>> address@hidden,
>>> address@hidden, address@hidden
>>> Inviato: Martedì, 7 maggio 2013 17:44:59
>>> Oggetto: Re: [Qemu-devel] [PATCH 01/40] memory: assert that PhysPageEntry's 
>>> ptr does not overflow
>>>
>>> On 7 May 2013 15:16, Paolo Bonzini <address@hidden> wrote:
>>>> Signed-off-by: Paolo Bonzini <address@hidden>
>>>> ---
>>>>  exec.c |    2 ++
>>>>  1 files changed, 2 insertions(+), 0 deletions(-)
>>>>
>>>> diff --git a/exec.c b/exec.c
>>>> index 19725db..2e5b89a 100644
>>>> --- a/exec.c
>>>> +++ b/exec.c
>>>> @@ -719,6 +719,8 @@ static void destroy_all_mappings(AddressSpaceDispatch
>>>> *d)
>>>>
>>>>  static uint16_t phys_section_add(MemoryRegionSection *section)
>>>>  {
>>>> +    assert(phys_sections_nb < TARGET_PAGE_SIZE);
>>>> +
>>>>      if (phys_sections_nb == phys_sections_nb_alloc) {
>>>>          phys_sections_nb_alloc = MAX(phys_sections_nb_alloc * 2, 16);
>>>>          phys_sections = g_renew(MemoryRegionSection, phys_sections,
>>>
>>> Why is the limit we're asserting not the same as the maximum
>>> size that we pass to g_renew() below?
>>
>> That's a minimum size, isn't it?
>>
>> I'm asserting that the physical section number doesn't overflow into
>> the page, since the TLB entries are stored as a combination of the two.
>>
> Could you explain more detail? Why < TARGET_PAGE_SIZE, not 2^15?

Because the TLB entry is the "or" of the page address and the
phys_section.  Look here:

hwaddr memory_region_section_get_iotlb(CPUArchState *env,
                                                   MemoryRegionSection *section,
                                                   target_ulong vaddr,
                                                   hwaddr paddr,
                                                   int prot,
                                                   target_ulong *address)
{
    hwaddr iotlb;
    CPUWatchpoint *wp;

    if (memory_region_is_ram(section->mr)) {
        /* Normal RAM.  */
        iotlb = (memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK)
            + memory_region_section_addr(section, paddr);
        if (!section->readonly) {
            iotlb |= phys_section_notdirty;
        } else {
            iotlb |= phys_section_rom;
        }
    } else {
        iotlb = section - phys_sections;
        iotlb += memory_region_section_addr(section, paddr);
    }

where the else could be written better as:

        iotlb = memory_region_section_addr(section, paddr);
        iotlb |= section - phys_sections;

memory_region_section_addr will return a page-aligned value.

Paolo



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