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Re: [Qemu-devel] [PATCH arm-devs v2 5/5] sd/sd.c: Fix "inquiry" ACMD41
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH arm-devs v2 5/5] sd/sd.c: Fix "inquiry" ACMD41 |
Date: |
Fri, 24 May 2013 09:14:29 +0100 |
On 24 May 2013 06:18, <address@hidden> wrote:
> From: Peter Crosthwaite <address@hidden>
>
> QEMU models two (of the three) ACMD41 has two modes, "inquiry" and
> "first". The selection logic for which of the two is incorrect - it
> compares != 0 for the entire argument value rather than only bits 23:0
> as per the spec. Fix.
>
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
> Changed since v1:
> Total rewrite
>
> hw/sd/sd.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/sd/sd.c b/hw/sd/sd.c
> index 2e0ef3e..4d26578 100644
> --- a/hw/sd/sd.c
> +++ b/hw/sd/sd.c
> @@ -1278,8 +1278,9 @@ static sd_rsp_type_t sd_app_command(SDState *sd,
> switch (sd->state) {
> case sd_idle_state:
> /* We accept any voltage. 10000 V is nothing. */
> - if (req.arg)
> + if (req.arg & 0x00ffffff) {
> sd->state = sd_ready_state;
> + }
>
> return sd_r3;
Could we have a comment here please?
thanks
-- PMM
- [Qemu-devel] [PATCH arm-devs v2 0/5] SD and SDHCI Fixes, peter . crosthwaite, 2013/05/24
- [Qemu-devel] [PATCH arm-devs v2 1/5] sd/sdhci.c: Only reset data_count on new commands, peter . crosthwaite, 2013/05/24
- [Qemu-devel] [PATCH arm-devs v2 2/5] sd/sdhci: Fix Buffer Write Ready interrupt, peter . crosthwaite, 2013/05/24
- [Qemu-devel] [PATCH arm-devs v2 3/5] sd/sdhci.c: Fix bdata_read DPRINT message, peter . crosthwaite, 2013/05/24
- [Qemu-devel] [PATCH arm-devs v2 4/5] sd/sdhci:ADMA: fix interrupt, peter . crosthwaite, 2013/05/24
- [Qemu-devel] [PATCH arm-devs v2 5/5] sd/sd.c: Fix "inquiry" ACMD41, peter . crosthwaite, 2013/05/24
- Re: [Qemu-devel] [PATCH arm-devs v2 5/5] sd/sd.c: Fix "inquiry" ACMD41,
Peter Maydell <=
- Re: [Qemu-devel] [PATCH arm-devs v2 0/5] SD and SDHCI Fixes, Peter Maydell, 2013/05/24