[Qemu-devel] [PATCH 11/22] exec: introduce memory_access_is_direct

[Paolo Bonzini]

After the previous patches, this is a common test for all read/write
functions.

address_space_rw to ROMs is now treated as "unassigned" instead of being
ignored.  This matches what TCG-generated code does.

Signed-off-by: Paolo Bonzini <address@hidden>
---
 exec.c | 39 ++++++++++++++++++++++-----------------
 1 file changed, 22 insertions(+), 17 deletions(-)

diff --git a/exec.c b/exec.c
index 411a224..7f6b5dd 100644
--- a/exec.c
+++ b/exec.c
@@ -1853,6 +1853,18 @@ static void invalidate_and_set_dirty(hwaddr addr,
     xen_modified_memory(addr, length);
 }
 
+static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
+{
+    if (memory_region_is_ram(mr)) {
+        return !(is_write && mr->readonly);
+    }
+    if (memory_region_is_romd(mr)) {
+        return !is_write;
+    }
+
+    return false;
+}
+
 void address_space_rw(AddressSpace *as, hwaddr addr, uint8_t *buf,
                       int len, bool is_write)
 {
@@ -1867,7 +1879,7 @@ void address_space_rw(AddressSpace *as, hwaddr addr, 
uint8_t *buf,
         section = address_space_translate(as, addr, &addr1, &l, is_write);
 
         if (is_write) {
-            if (!memory_region_is_ram(section->mr)) {
+            if (!memory_access_is_direct(section->mr, is_write)) {
                 /* XXX: could force cpu_single_env to NULL to avoid
                    potential bugs */
                 if (l >= 4 && ((addr1 & 3) == 0)) {
@@ -1886,7 +1898,7 @@ void address_space_rw(AddressSpace *as, hwaddr addr, 
uint8_t *buf,
                     io_mem_write(section->mr, addr1, val, 1);
                     l = 1;
                 }
-            } else if (!section->readonly) {
+            } else {
                 addr1 += memory_region_get_ram_addr(section->mr);
                 /* RAM case */
                 ptr = qemu_get_ram_ptr(addr1);
@@ -1894,8 +1906,7 @@ void address_space_rw(AddressSpace *as, hwaddr addr, 
uint8_t *buf,
                 invalidate_and_set_dirty(addr1, l);
             }
         } else {
-            if (!(memory_region_is_ram(section->mr) ||
-                  memory_region_is_romd(section->mr))) {
+            if (!memory_access_is_direct(section->mr, is_write)) {
                 /* I/O case */
                 if (l >= 4 && ((addr1 & 3) == 0)) {
                     /* 32 bit read access */
@@ -2050,7 +2061,7 @@ void *address_space_map(AddressSpace *as,
         l = len;
         section = address_space_translate(as, addr, &xlat, &l, is_write);
 
-        if (!(memory_region_is_ram(section->mr) && !section->readonly)) {
+        if (!memory_access_is_direct(section->mr, is_write)) {
             if (todo || bounce.buffer) {
                 break;
             }
@@ -2140,9 +2151,7 @@ static inline uint32_t ldl_phys_internal(hwaddr addr,
 
     section = address_space_translate(&address_space_memory, addr, &addr1, &l,
                                       false);
-    if (l < 4 ||
-        !(memory_region_is_ram(section->mr) ||
-          memory_region_is_romd(section->mr))) {
+    if (l < 4 || !memory_access_is_direct(section->mr, false)) {
         /* I/O case */
         val = io_mem_read(section->mr, addr1, 4);
 #if defined(TARGET_WORDS_BIGENDIAN)
@@ -2201,9 +2210,7 @@ static inline uint64_t ldq_phys_internal(hwaddr addr,
 
     section = address_space_translate(&address_space_memory, addr, &addr1, &l,
                                       false);
-    if (l < 8 ||
-        !(memory_region_is_ram(section->mr) ||
-          memory_region_is_romd(section->mr))) {
+    if (l < 8 || !memory_access_is_direct(section->mr, false)) {
         /* I/O case */
 
         /* XXX This is broken when device endian != cpu endian.
@@ -2270,9 +2277,7 @@ static inline uint32_t lduw_phys_internal(hwaddr addr,
 
     section = address_space_translate(&address_space_memory, addr, &addr1, &l,
                                       false);
-    if (l < 2 ||
-        !(memory_region_is_ram(section->mr) ||
-          memory_region_is_romd(section->mr))) {
+    if (l < 2 || !memory_access_is_direct(section->mr, false)) {
         /* I/O case */
         val = io_mem_read(section->mr, addr1, 2);
 #if defined(TARGET_WORDS_BIGENDIAN)
@@ -2331,7 +2336,7 @@ void stl_phys_notdirty(hwaddr addr, uint32_t val)
 
     section = address_space_translate(&address_space_memory, addr, &addr1, &l,
                                       true);
-    if (l < 4 || !memory_region_is_ram(section->mr) || section->readonly) {
+    if (l < 4 || !memory_access_is_direct(section->mr, true)) {
         io_mem_write(section->mr, addr1, val, 4);
     } else {
         addr1 += memory_region_get_ram_addr(section->mr) & TARGET_PAGE_MASK;
@@ -2361,7 +2366,7 @@ static inline void stl_phys_internal(hwaddr addr, 
uint32_t val,
 
     section = address_space_translate(&address_space_memory, addr, &addr1, &l,
                                       true);
-    if (l < 4 || !memory_region_is_ram(section->mr) || section->readonly) {
+    if (l < 4 || !memory_access_is_direct(section->mr, true)) {
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian == DEVICE_LITTLE_ENDIAN) {
             val = bswap32(val);
@@ -2424,7 +2429,7 @@ static inline void stw_phys_internal(hwaddr addr, 
uint32_t val,
 
     section = address_space_translate(&address_space_memory, addr, &addr1, &l,
                                       true);
-    if (l < 2 || !memory_region_is_ram(section->mr) || section->readonly) {
+    if (l < 2 || !memory_access_is_direct(section->mr, true)) {
 #if defined(TARGET_WORDS_BIGENDIAN)
         if (endian == DEVICE_LITTLE_ENDIAN) {
             val = bswap16(val);
-- 
1.8.1.4