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[Qemu-devel] [PATCH v1 4/5] intc/xilinx_intc: Inhibit write to ISR when


From: peter . crosthwaite
Subject: [Qemu-devel] [PATCH v1 4/5] intc/xilinx_intc: Inhibit write to ISR when HIE
Date: Fri, 7 Jun 2013 12:40:18 +1000

From: Peter Crosthwaite <address@hidden>

When the Hardware Interrupt Enable (HIE) bit is set, software cannot
change ISR. Add write guard accordingly.

Signed-off-by: Peter Crosthwaite <address@hidden>
---

 hw/intc/xilinx_intc.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 09b4453..ddedfa3 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -116,6 +116,11 @@ pic_write(void *opaque, hwaddr addr,
         case R_CIE:
             p->regs[R_IER] &= ~value; /* Atomic clear ie.  */
             break;
+        case R_ISR:
+            if ((p->regs[R_MER] & 2)) {
+                break;
+            }
+            /* fallthrough */
         default:
             if (addr < ARRAY_SIZE(p->regs))
                 p->regs[addr] = value;
-- 
1.8.3.rc1.44.gb387c77.dirty




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