[Qemu-devel] [PATCH RFC 08/15] q35-mch: create pci address space

[Hu Tao]

Signed-off-by: Hu Tao <address@hidden>
---
 hw/i386/pc_q35.c          | 13 ++++---------
 hw/pci-host/q35.c         | 12 +++++++-----
 include/hw/pci-host/q35.h |  1 +
 3 files changed, 12 insertions(+), 14 deletions(-)

diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index bb0ce6a..109bb64 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -64,7 +64,6 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
     BusState *idebus[MAX_SATA_PORTS];
     ISADevice *rtc_state;
     ISADevice *floppy;
-    MemoryRegion *pci_memory;
     MemoryRegion *rom_memory;
     MemoryRegion *ram_memory;
     GSIState *gsi_state;
@@ -87,6 +86,9 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
 
     kvmclock_create();
 
+    /* create pci host bus */
+    q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
+
     if (ram_size >= 0xb0000000) {
         above_4g_mem_size = ram_size - 0xb0000000;
         below_4g_mem_size = 0xb0000000;
@@ -97,11 +99,8 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
 
     /* pci enabled */
     if (pci_enabled) {
-        pci_memory = g_new(MemoryRegion, 1);
-        memory_region_init(pci_memory, "pci", INT64_MAX);
-        rom_memory = pci_memory;
+        rom_memory = &q35_host->pci_address_space;
     } else {
-        pci_memory = NULL;
         rom_memory = get_system_memory();
     }
 
@@ -122,11 +121,7 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
         gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
     }
 
-    /* create pci host bus */
-    q35_host = Q35_HOST_DEVICE(qdev_create(NULL, TYPE_Q35_HOST_DEVICE));
-
     q35_host->mch.ram_memory = ram_memory;
-    q35_host->mch.pci_address_space = pci_memory;
     q35_host->mch.system_memory = get_system_memory();
     q35_host->mch.address_space_io = get_system_io();
     q35_host->mch.below_4g_mem_size = below_4g_mem_size;
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index 24df6b5..3ab5ed8 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -36,8 +36,7 @@
 
 static int q35_host_init(SysBusDevice *dev)
 {
-    PCIBus *b;
-    PCIHostState *pci = FROM_SYSBUS(PCIHostState, dev);
+    PCIHostState *pci = PCI_HOST_BRIDGE(dev);
     Q35PCIHost *s = Q35_HOST_DEVICE(&dev->qdev);
 
     memory_region_init_io(&pci->conf_mem, &pci_host_conf_le_ops, pci,
@@ -53,11 +52,12 @@ static int q35_host_init(SysBusDevice *dev)
     if (pcie_host_init(&s->host) < 0) {
         return -1;
     }
-    b = pci_bus_new(&s->host.pci.busdev.qdev, "pcie.0",
+
+    s->mch.pci_address_space = &s->pci_address_space;
+    pci->bus = pci_bus_new(DEVICE(s), "pcie.0",
                     s->mch.pci_address_space, s->mch.address_space_io,
                     0, TYPE_PCIE_BUS);
-    s->host.pci.bus = b;
-    qdev_set_parent_bus(DEVICE(&s->mch), BUS(b));
+    qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus));
     qdev_init_nofail(DEVICE(&s->mch));
 
     return 0;
@@ -87,6 +87,8 @@ static void q35_host_initfn(Object *obj)
     object_property_add_child(OBJECT(s), "mch", OBJECT(&s->mch), NULL);
     qdev_prop_set_uint32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0));
     qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false);
+
+    memory_region_init(&s->pci_address_space, "pci", INT64_MAX);
 }
 
 static const TypeInfo q35_host_info = {
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index e182c82..1c02420 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -60,6 +60,7 @@ typedef struct MCHPCIState {
 typedef struct Q35PCIHost {
     PCIExpressHost host;
     MCHPCIState mch;
+    MemoryRegion pci_address_space;
 } Q35PCIHost;
 
 #define Q35_MASK(bit, ms_bit, ls_bit) \
-- 
1.8.3.1