Re: [Qemu-devel] [PATCH] target-mips: fix mipsdsp_trunc16_sat16_round

[Richard Henderson]

On 06/17/2013 03:39 PM, Petar Jovanovic wrote:
> -    int64_t temp;
> -
> -    temp = (int32_t)a + 0x00008000;
> +    uint16_t temp;
> 
> -    if (a > (int)0x7fff8000) {
> -        temp = 0x7FFFFFFF;
> +    if (a > 0x7FFF7FFF) {
> +        temp = 0x7FFF;
>          set_DSPControl_overflow_flag(1, 22, env);
> +    } else {
> +        temp = ((a + 0x8000) >> 16) & 0xFFFF;

This doesn't look right either, as it doesn't properly check for overflow of
negative values.  I'd feel better if we implement this function exactly as
documented, modulo actually using 64-bit arithmetic.  How about

  int32_t temp;

  /* Shift right by one, to avoid needing 64-bit arithmetic.  As this A is
     signed, this creates the copy of the sign bit as documented.  */
  a >>= 1;
  temp = a + 0x4000;

  /* Compare temp{31} with temp{30} by xoring into the sign bit.  */
  if ((temp ^ (temp << 1)) < 0) {
      set_DSPControl_overflow_flag(1, 22, env);
      return 0x7fff;
  }
  return temp >> 15;


r~