[Qemu-devel] [PATCH RFC qom-cpu 16/41] target-microblaze: Change gen_intermediate_code_internal() argument types

[Andreas Färber]

Use MicroBlazeCPU and bool.

Prepares for moving singlestep_enabled field to CPUState.

Signed-off-by: Andreas Färber <address@hidden>
---
 target-microblaze/translate.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index f9acdb1..6484378 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1738,12 +1738,10 @@ static void check_breakpoint(CPUMBState *env, 
DisasContext *dc)
 
 /* generate intermediate code for basic block 'tb'.  */
 static void
-gen_intermediate_code_internal(CPUMBState *env, TranslationBlock *tb,
-                               int search_pc)
+gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
+                               bool search_pc)
 {
-#if !SIM_COMPAT
-    MicroBlazeCPU *cpu = mb_env_get_cpu(env);
-#endif
+    CPUMBState *env = &cpu->env;
     uint16_t *gen_opc_end;
     uint32_t pc_start;
     int j, lj;
@@ -1944,12 +1942,12 @@ gen_intermediate_code_internal(CPUMBState *env, 
TranslationBlock *tb,
 
 void gen_intermediate_code (CPUMBState *env, struct TranslationBlock *tb)
 {
-    gen_intermediate_code_internal(env, tb, 0);
+    gen_intermediate_code_internal(mb_env_get_cpu(env), tb, false);
 }
 
 void gen_intermediate_code_pc (CPUMBState *env, struct TranslationBlock *tb)
 {
-    gen_intermediate_code_internal(env, tb, 1);
+    gen_intermediate_code_internal(mb_env_get_cpu(env), tb, true);
 }
 
 void mb_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
-- 
1.8.1.4