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[Qemu-devel] [PATCH v5 04/21] target-arm: Fix target_ulong/uint32_t conf
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v5 04/21] target-arm: Fix target_ulong/uint32_t confusions |
Date: |
Mon, 1 Jul 2013 18:35:03 +0100 |
From: Alexander Graf <address@hidden>
Correct a few places that were using uint32_t or a 32 bit
only format string to handle something that should be a target_ulong.
Signed-off-by: Alexander Graf <address@hidden>
Signed-off-by: John Rigby <address@hidden>
[PMM: split out to separate patch; added gen_goto_tb() and
gen_set_pc_im() dest params to list of things to change.]
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/cpu.h | 4 ++--
target-arm/translate.c | 9 +++++----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index abcc0b4..1f3beac 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -816,7 +816,7 @@ static inline void cpu_pc_from_tb(CPUARMState *env,
TranslationBlock *tb)
}
/* Load an instruction and return it in the standard little-endian order */
-static inline uint32_t arm_ldl_code(CPUARMState *env, uint32_t addr,
+static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr,
bool do_swap)
{
uint32_t insn = cpu_ldl_code(env, addr);
@@ -827,7 +827,7 @@ static inline uint32_t arm_ldl_code(CPUARMState *env,
uint32_t addr,
}
/* Ditto, for a halfword (Thumb) instruction */
-static inline uint16_t arm_lduw_code(CPUARMState *env, uint32_t addr,
+static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr,
bool do_swap)
{
uint16_t insn = cpu_lduw_code(env, addr);
diff --git a/target-arm/translate.c b/target-arm/translate.c
index a6c2cf9..02319b3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -903,7 +903,7 @@ DO_GEN_ST(st8)
DO_GEN_ST(st16)
DO_GEN_ST(st32)
-static inline void gen_set_pc_im(uint32_t val)
+static inline void gen_set_pc_im(target_ulong val)
{
tcg_gen_movi_i32(cpu_R[15], val);
}
@@ -3411,7 +3411,7 @@ static int disas_vfp_insn(CPUARMState * env, DisasContext
*s, uint32_t insn)
return 0;
}
-static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest)
+static inline void gen_goto_tb(DisasContext *s, int n, target_ulong dest)
{
TranslationBlock *tb;
@@ -9869,7 +9869,7 @@ static inline void
gen_intermediate_code_internal(CPUARMState *env,
uint16_t *gen_opc_end;
int j, lj;
target_ulong pc_start;
- uint32_t next_page_start;
+ target_ulong next_page_start;
int num_insns;
int max_insns;
@@ -10023,7 +10023,8 @@ static inline void
gen_intermediate_code_internal(CPUARMState *env,
}
if (tcg_check_temp_count()) {
- fprintf(stderr, "TCG temporary leak before %08x\n", dc->pc);
+ fprintf(stderr, "TCG temporary leak before "TARGET_FMT_lx"\n",
+ dc->pc);
}
/* Translation stops when a conditional branch is encountered.
--
1.7.9.5
- [Qemu-devel] [PATCH v5 06/21] target-arm: Prepare translation for AArch64 code, (continued)
- [Qemu-devel] [PATCH v5 06/21] target-arm: Prepare translation for AArch64 code, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 20/21] default-configs: Add config for aarch64-linux-user, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 18/21] linux-user: AArch64 requires at least 3.8.0, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 10/21] linux-user: Add cpu loop for AArch64, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 13/21] linux-user: Add signal handling for AArch64, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 14/21] linux-user: Make sure NWFPE code is 32 bit ARM only, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 03/21] target-arm: Export cpu_env, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 01/21] target-arm: Abstract out load/store from a vaddr in AArch32, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 21/21] default-configs: Add config for aarch64-softmmu, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 02/21] target-arm: Extract the disas struct to a header file, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 04/21] target-arm: Fix target_ulong/uint32_t confusions,
Peter Maydell <=
- [Qemu-devel] [PATCH v5 16/21] linux-user: Add AArch64 termbits.h definitions, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 19/21] configure: Add handling code for AArch64 targets, Peter Maydell, 2013/07/01
- [Qemu-devel] [PATCH v5 12/21] linux-user: Fix up AArch64 syscall handlers, Peter Maydell, 2013/07/01
- Re: [Qemu-devel] [PATCH v5 00/21] AArch64 preparation patchset, Peter Maydell, 2013/07/01