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[Qemu-devel] [PULL 07/15] tcg: Simplify logic using TCG_OPF_NOT_PRESENT
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 07/15] tcg: Simplify logic using TCG_OPF_NOT_PRESENT |
Date: |
Tue, 9 Jul 2013 07:18:27 -0700 |
Expand the definition of "not present" to include "should not be present".
This means we can simplify the logic surrounding the generic tcg opcodes
for which the host backend ought not be providing definitions.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/tcg-opc.h | 26 +++++++++++++++-----------
tcg/tcg.c | 4 +---
tcg/tcg.h | 3 ++-
3 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h
index c94e255..a8af5b9 100644
--- a/tcg/tcg-opc.h
+++ b/tcg/tcg-opc.h
@@ -27,17 +27,21 @@
*/
/* predefined ops */
-DEF(end, 0, 0, 0, 0) /* must be kept first */
-DEF(nop, 0, 0, 0, 0)
-DEF(nop1, 0, 0, 1, 0)
-DEF(nop2, 0, 0, 2, 0)
-DEF(nop3, 0, 0, 3, 0)
-DEF(nopn, 0, 0, 1, 0) /* variable number of parameters */
+DEF(end, 0, 0, 0, TCG_OPF_NOT_PRESENT) /* must be kept first */
+DEF(nop, 0, 0, 0, TCG_OPF_NOT_PRESENT)
+DEF(nop1, 0, 0, 1, TCG_OPF_NOT_PRESENT)
+DEF(nop2, 0, 0, 2, TCG_OPF_NOT_PRESENT)
+DEF(nop3, 0, 0, 3, TCG_OPF_NOT_PRESENT)
-DEF(discard, 1, 0, 0, 0)
+/* variable number of parameters */
+DEF(nopn, 0, 0, 1, TCG_OPF_NOT_PRESENT)
+
+DEF(discard, 1, 0, 0, TCG_OPF_NOT_PRESENT)
+DEF(set_label, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT)
+
+/* variable number of parameters */
+DEF(call, 0, 1, 2, TCG_OPF_CALL_CLOBBER)
-DEF(set_label, 0, 0, 1, TCG_OPF_BB_END)
-DEF(call, 0, 1, 2, TCG_OPF_CALL_CLOBBER) /* variable number of parameters */
DEF(br, 0, 0, 1, TCG_OPF_BB_END)
#define IMPL(X) (__builtin_constant_p(X) && !(X) ? TCG_OPF_NOT_PRESENT : 0)
@@ -166,9 +170,9 @@ DEF(muls2_i64, 2, 2, 0, IMPL64 |
IMPL(TCG_TARGET_HAS_muls2_i64))
/* QEMU specific */
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
-DEF(debug_insn_start, 0, 0, 2, 0)
+DEF(debug_insn_start, 0, 0, 2, TCG_OPF_NOT_PRESENT)
#else
-DEF(debug_insn_start, 0, 0, 1, 0)
+DEF(debug_insn_start, 0, 0, 1, TCG_OPF_NOT_PRESENT)
#endif
DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END)
DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 1d8099c..c7e6567 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1160,9 +1160,7 @@ void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs)
i = 0;
for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
const TCGOpDef *def = &tcg_op_defs[op];
- if (op < INDEX_op_call
- || op == INDEX_op_debug_insn_start
- || (def->flags & TCG_OPF_NOT_PRESENT)) {
+ if (def->flags & TCG_OPF_NOT_PRESENT) {
/* Wrong entry in op definitions? */
if (def->used) {
fprintf(stderr, "Invalid op definition for %s\n", def->name);
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 28ca1bd..f3f9889 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -596,7 +596,8 @@ enum {
TCG_OPF_SIDE_EFFECTS = 0x04,
/* Instruction operands are 64-bits (otherwise 32-bits). */
TCG_OPF_64BIT = 0x08,
- /* Instruction is optional and not implemented by the host. */
+ /* Instruction is optional and not implemented by the host, or insn
+ is generic and should not be implemened by the host. */
TCG_OPF_NOT_PRESENT = 0x10,
};
--
1.8.1.4
- [Qemu-devel] [PULL 00/15] tcg: remainder and tcg-arm updates, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 01/15] tcg: Add myself to general TCG maintainership, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 02/15] tcg: Split rem requirement from div requirement, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 03/15] tcg-arm: Don't implement rem, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 05/15] tcg-ppc64: Don't implement rem, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 04/15] tcg-ppc: Don't implement rem, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 07/15] tcg: Simplify logic using TCG_OPF_NOT_PRESENT,
Richard Henderson <=
- [Qemu-devel] [PULL 06/15] tcg: Allow non-constant control macros, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 08/15] tcg-arm: Make use of conditional availability of opcodes for divide, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 09/15] tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 10/15] tcg-arm: Simplify logic in detecting the ARM ISA in use, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 11/15] tcg-arm: Use AT_PLATFORM to detect the host ISA, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 13/15] tcg: Move the CIE and FDE header definitions to common code, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 12/15] tcg: Fix high_pc fields in .debug_info, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 14/15] tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame size, Richard Henderson, 2013/07/09
- [Qemu-devel] [PULL 15/15] tcg-arm: Implement tcg_register_jit, Richard Henderson, 2013/07/09