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[Qemu-devel] [PATCH qom-cpu v3 31/41] target-sh4: Move cpu_gdb_{read, wr
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH qom-cpu v3 31/41] target-sh4: Move cpu_gdb_{read, write}_register() |
Date: |
Wed, 10 Jul 2013 00:23:50 +0200 |
Signed-off-by: Andreas Färber <address@hidden>
---
gdbstub.c | 117 +------------------------------------------
target-sh4/gdbstub.c | 137 +++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 138 insertions(+), 116 deletions(-)
create mode 100644 target-sh4/gdbstub.c
diff --git a/gdbstub.c b/gdbstub.c
index 7bcdd3f..61b1bc7 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -558,123 +558,8 @@ static int put_packet(GDBState *s, const char *buf)
#elif defined (TARGET_SH4)
-/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
-/* FIXME: We should use XML for this. */
+#include "target-sh4/gdbstub.c"
-static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
-{
- switch (n) {
- case 0 ... 7:
- if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
- GET_REGL(env->gregs[n + 16]);
- } else {
- GET_REGL(env->gregs[n]);
- }
- case 8 ... 15:
- GET_REGL(env->gregs[n]);
- case 16:
- GET_REGL(env->pc);
- case 17:
- GET_REGL(env->pr);
- case 18:
- GET_REGL(env->gbr);
- case 19:
- GET_REGL(env->vbr);
- case 20:
- GET_REGL(env->mach);
- case 21:
- GET_REGL(env->macl);
- case 22:
- GET_REGL(env->sr);
- case 23:
- GET_REGL(env->fpul);
- case 24:
- GET_REGL(env->fpscr);
- case 25 ... 40:
- if (env->fpscr & FPSCR_FR) {
- stfl_p(mem_buf, env->fregs[n - 9]);
- } else {
- stfl_p(mem_buf, env->fregs[n - 25]);
- }
- return 4;
- case 41:
- GET_REGL(env->ssr);
- case 42:
- GET_REGL(env->spc);
- case 43 ... 50:
- GET_REGL(env->gregs[n - 43]);
- case 51 ... 58:
- GET_REGL(env->gregs[n - (51 - 16)]);
- }
-
- return 0;
-}
-
-static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n)
-{
- switch (n) {
- case 0 ... 7:
- if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
- env->gregs[n + 16] = ldl_p(mem_buf);
- } else {
- env->gregs[n] = ldl_p(mem_buf);
- }
- break;
- case 8 ... 15:
- env->gregs[n] = ldl_p(mem_buf);
- break;
- case 16:
- env->pc = ldl_p(mem_buf);
- break;
- case 17:
- env->pr = ldl_p(mem_buf);
- break;
- case 18:
- env->gbr = ldl_p(mem_buf);
- break;
- case 19:
- env->vbr = ldl_p(mem_buf);
- break;
- case 20:
- env->mach = ldl_p(mem_buf);
- break;
- case 21:
- env->macl = ldl_p(mem_buf);
- break;
- case 22:
- env->sr = ldl_p(mem_buf);
- break;
- case 23:
- env->fpul = ldl_p(mem_buf);
- break;
- case 24:
- env->fpscr = ldl_p(mem_buf);
- break;
- case 25 ... 40:
- if (env->fpscr & FPSCR_FR) {
- env->fregs[n - 9] = ldfl_p(mem_buf);
- } else {
- env->fregs[n - 25] = ldfl_p(mem_buf);
- }
- break;
- case 41:
- env->ssr = ldl_p(mem_buf);
- break;
- case 42:
- env->spc = ldl_p(mem_buf);
- break;
- case 43 ... 50:
- env->gregs[n - 43] = ldl_p(mem_buf);
- break;
- case 51 ... 58:
- env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
- break;
- default:
- return 0;
- }
-
- return 4;
-}
#elif defined (TARGET_MICROBLAZE)
static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n)
diff --git a/target-sh4/gdbstub.c b/target-sh4/gdbstub.c
new file mode 100644
index 0000000..38bc630
--- /dev/null
+++ b/target-sh4/gdbstub.c
@@ -0,0 +1,137 @@
+/*
+ * SuperH gdb server stub
+ *
+ * Copyright (c) 2003-2005 Fabrice Bellard
+ * Copyright (c) 2013 SUSE LINUX Products GmbH
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
+/* FIXME: We should use XML for this. */
+
+static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n)
+{
+ switch (n) {
+ case 0 ... 7:
+ if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
+ GET_REGL(env->gregs[n + 16]);
+ } else {
+ GET_REGL(env->gregs[n]);
+ }
+ case 8 ... 15:
+ GET_REGL(env->gregs[n]);
+ case 16:
+ GET_REGL(env->pc);
+ case 17:
+ GET_REGL(env->pr);
+ case 18:
+ GET_REGL(env->gbr);
+ case 19:
+ GET_REGL(env->vbr);
+ case 20:
+ GET_REGL(env->mach);
+ case 21:
+ GET_REGL(env->macl);
+ case 22:
+ GET_REGL(env->sr);
+ case 23:
+ GET_REGL(env->fpul);
+ case 24:
+ GET_REGL(env->fpscr);
+ case 25 ... 40:
+ if (env->fpscr & FPSCR_FR) {
+ stfl_p(mem_buf, env->fregs[n - 9]);
+ } else {
+ stfl_p(mem_buf, env->fregs[n - 25]);
+ }
+ return 4;
+ case 41:
+ GET_REGL(env->ssr);
+ case 42:
+ GET_REGL(env->spc);
+ case 43 ... 50:
+ GET_REGL(env->gregs[n - 43]);
+ case 51 ... 58:
+ GET_REGL(env->gregs[n - (51 - 16)]);
+ }
+
+ return 0;
+}
+
+static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n)
+{
+ switch (n) {
+ case 0 ... 7:
+ if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
+ env->gregs[n + 16] = ldl_p(mem_buf);
+ } else {
+ env->gregs[n] = ldl_p(mem_buf);
+ }
+ break;
+ case 8 ... 15:
+ env->gregs[n] = ldl_p(mem_buf);
+ break;
+ case 16:
+ env->pc = ldl_p(mem_buf);
+ break;
+ case 17:
+ env->pr = ldl_p(mem_buf);
+ break;
+ case 18:
+ env->gbr = ldl_p(mem_buf);
+ break;
+ case 19:
+ env->vbr = ldl_p(mem_buf);
+ break;
+ case 20:
+ env->mach = ldl_p(mem_buf);
+ break;
+ case 21:
+ env->macl = ldl_p(mem_buf);
+ break;
+ case 22:
+ env->sr = ldl_p(mem_buf);
+ break;
+ case 23:
+ env->fpul = ldl_p(mem_buf);
+ break;
+ case 24:
+ env->fpscr = ldl_p(mem_buf);
+ break;
+ case 25 ... 40:
+ if (env->fpscr & FPSCR_FR) {
+ env->fregs[n - 9] = ldfl_p(mem_buf);
+ } else {
+ env->fregs[n - 25] = ldfl_p(mem_buf);
+ }
+ break;
+ case 41:
+ env->ssr = ldl_p(mem_buf);
+ break;
+ case 42:
+ env->spc = ldl_p(mem_buf);
+ break;
+ case 43 ... 50:
+ env->gregs[n - 43] = ldl_p(mem_buf);
+ break;
+ case 51 ... 58:
+ env->gregs[n - (51 - 16)] = ldl_p(mem_buf);
+ break;
+ default:
+ return 0;
+ }
+
+ return 4;
+}
--
1.8.1.4
- [Qemu-devel] [PATCH qom-cpu v3 25/41] target-ppc: Move cpu_gdb_{read, write}_register(), (continued)
- [Qemu-devel] [PATCH qom-cpu v3 25/41] target-ppc: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 27/41] target-arm: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 26/41] target-sparc: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 28/41] target-m68k: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 21/41] gdbstub: Fix cpu_gdb_{read, write}_register() Coding Style, Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 24/41] target-i386: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 14/41] cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook, Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 23/41] cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs, Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 30/41] target-openrisc: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 29/41] target-mips: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 31/41] target-sh4: Move cpu_gdb_{read, write}_register(),
Andreas Färber <=
- [Qemu-devel] [PATCH qom-cpu v3 33/41] target-cris: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 32/41] target-microblaze: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 34/41] target-alpha: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 35/41] target-s390x: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 36/41] target-lm32: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 37/41] target-xtensa: Move cpu_gdb_{read, write}_register(), Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 40/41] target-cris: Factor out CPUClass::gdb_read_register() hook for v10, Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 41/41] cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML, Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 38/41] gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions, Andreas Färber, 2013/07/09
- [Qemu-devel] [PATCH qom-cpu v3 39/41] cpu: Introduce CPUClass::gdb_{read, write}_register(), Andreas Färber, 2013/07/09