qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH for-1.6] target-mips: do not raise exceptions wh


From: Andreas Färber
Subject: Re: [Qemu-devel] [PATCH for-1.6] target-mips: do not raise exceptions when accessing invalid memory
Date: Sat, 27 Jul 2013 18:49:18 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130620 Thunderbird/17.0.7

Am 27.07.2013 18:18, schrieb Hervé Poussineau:
> c658b94f6e8c206c59d02aa6fbac285b86b53d2c ("cpu: Turn cpu_unassigned_access()
> into a CPUState hook") made MIPS raise exceptions when accessing
> invalid memory for data, by unconditionally calling CPUState unassigned hook.
> 
> While this seems to be the right behaviour, this breaks a lot of guests
> (Linux on Malta, NetBSD on Magnum...) which try to access not emulated devices
> and crash because they don't handle the data load/store exception.
> 
> Revert to previous behaviour by not handling the !is_exec case in MIPS CPU 
> hook.
> 
> Signed-off-by: Hervé Poussineau <address@hidden>

So before my refactoring the following targets called it in files...

alpha: cputlb.c and memory.c
microblaze: memory.c
mips: cputlb.c
sparc: cputlb.c and memory.c

... and now all four call it in both places, breaking mips.

The proposed solution looks acceptable to me, but I am no mips expert;
CC'ing Aurélien, Stefan and some Imagination guys.

As a reminder, 1.6-rc0 is due on Monday.

> ---
> 
> Another solution would be to add a big dummy memory regions on all MIPS boards
> to catch memory accesses and not raise an exception. However, this means that
> each MIPS board will have its own unassigned memory handler, different from 
> the
> global QEMU one.

sparc uses the empty_slot device to catch accesses to devices that we
are not yet emulating IIUC. I.e., empty_slot_init(addr, size).

Peter/Edgar, can you double-check whether calling the unassigned_access
handler from cputlb.c rather than cpu_abort()ing is OK for microblaze?

Thanks,
Andreas

> ---
>  target-mips/op_helper.c |    3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
> index 5cf1c3f..94f1692 100644
> --- a/target-mips/op_helper.c
> +++ b/target-mips/op_helper.c
> @@ -2156,7 +2156,8 @@ void mips_cpu_unassigned_access(CPUState *cs, hwaddr 
> addr,
>      if (is_exec) {
>          helper_raise_exception(env, EXCP_IBE);
>      } else {
> -        helper_raise_exception(env, EXCP_DBE);
> +        qemu_log_mask(LOG_UNIMP, "should raise DBE exception "
> +                      "due to accessing memory at %" HWADDR_PRIx "\n", addr);
>      }
>  }
>  #endif /* !CONFIG_USER_ONLY */
> 


-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg



reply via email to

[Prev in Thread] Current Thread [Next in Thread]