Re: [Qemu-devel] [PATCH 1/2] memory: Provide separate handling of unassigned io ports accesses

[Andreas Färber]

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

Am 05.08.2013 13:03, schrieb Jan Kiszka:
> On 2013-08-05 12:51, Peter Maydell wrote:
>> On 5 August 2013 11:44, Jan Kiszka <address@hidden> wrote:
>>> On 2013-08-05 12:36, Peter Maydell wrote:
>>>> On 5 August 2013 11:30, Jan Kiszka <address@hidden>
>>>> wrote:
>>>>> On 2013-08-05 11:59, Peter Maydell wrote:
>>>>>> Or do you mean that if we had:
>>>>>> 
>>>>>> [ system memory region, with its own default read/write
>>>>>> ops ]
>>>>> 
>>>>> I cannot imagine how this could work. The system memory
>>>>> region has no clue about what the regions below it can
>>>>> handle and what not. So it has to pass through the io
>>>>> window.
>>>> 
>>>> The system memory region's just a container, you can add a 
>>>> background region to it at lowest-possible-priority, which 
>>>> then takes accesses which are either (a) not in any
>>>> subregion or (b) in a subregion but that container doesn't
>>>> specify its own io ops and nothing in that container handles
>>>> the access. (Or you could create the system memory region
>>>> with its own IO ops, which would have the same effect.)
>>> 
>>> First, we do not render MMIO and IO within the same address
>>> space so far.
>> 
>> Is this a statement made because you've checked all the boards 
>> and know that nobody's mapping the system-io memory region into 
>> the system-memory region? (It is technically trivial, you just
>> need to call memory_region_add_subregion() directly or
>> indirectly...)
> 
> I know this because I just recently wrote the patch that enables
> this trivial step, i.e. converted PIO dispatching to the memory
> subsystem.

Several patches have been applied since, e.g.

sPAPR PHB:
http://git.qemu.org/?p=qemu.git;a=commit;h=66aab867cedd2a2d81b4d64eff7c3e0f6f272bbf
- -> aliases system_io()

PReP i82378 PCI-ISA bridge:
http://git.qemu.org/?p=qemu.git;a=commit;h=5c9736789b79ea49cd236ac326f0a414f63b1015
- -> uses pci_address_space_io()

Alpha Typhoon:
http://git.qemu.org/?p=qemu.git;a=commit;h=056e6bae1c91f47165d962564f82f5176bae47f0
http://git.qemu.org/?p=qemu.git;a=commit;h=3661049fec64ffd7ab008e57e396881c6a4b53a4

[For those joining late, this discussion is about whether making PIO
MemoryRegion ..._io rather than just container might hurt some use
case. If you have a concrete test case that would be appreciated; a
we-don't-care-about-such-a-fringe-case would help as well.]

Andreas

- -- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)

iQIcBAEBAgAGBQJR/43lAAoJEPou0S0+fgE/EiMQAJP7YfqF+YYKvS5NUonLMo26
ncsY7E9IikpWSCcL/QVwmfFTfDjptR0iI987+4OcE3Sf0nH3pv5FFge4aR965Of1
sBvqfAVD9ihnV2sO+s2rImgw9tyC/kadA6k0hLB8h/+QDgl/J5wjpI0A29OHT8Uc
BYv210POLqzU+nAO83t9w3xZA3Q60+X8YxI3GqAd6CEMS7i2yga0SK2Q3U1P7o+G
sE6hqYE7sWKtaQlosTWuAxYnOOXcY2u+EEnqS6SXqZbp4NcitRYCamNu+8ARDAab
JNIbbmCt1GTzdQ6PxVu5paPRUJbETQ2rDWxAq4Ryr37Gi5vb9FFPNMKpSncNu28b
o46Fr6QMDTMNgk0Ac7F4WKKICGsCMuHuzot7JLoRkfhPQunqwQR5yEyvUKwYtV5p
pAl1Frop+88X6HEmUkNJHR1FnhI5pVLImyxJTLXVRGgZqx7i1J8cvVPM6PhWa8tU
NFFVKy7aWNj5MOVE8oSGK+LWilikb7i0b7YxDI/Ky/OI62niy3CK+XQgYfSFXEZ/
s8ErAfI5CMKy0O1/KbUy6V3cGpGM2xRizBSDCy3GqP3XD3If3tG8siRSarEG2FxO
TO73OWtYarAtZ5cIRIsefV3uT/CA6g8p/dXgfp1WxDSIZcqZIMz5FIGgIDoIT7i4
6fPuo2wYiZXLS3/g6tuP
=egTc
-----END PGP SIGNATURE-----