Re: [Qemu-devel] [SeaBIOS] [PATCH] acpi: hide 64-bit PCI hole for Windows XP

[Michael S. Tsirkin]

On Thu, Aug 08, 2013 at 09:57:39AM +0200, Gerd Hoffmann wrote:
> >>   (3) mmconf xbar start (MCFG, q35 only, at 0xb0000000 now).
> >>   (4) pmbase (FADT, at 0xb000 now).
> >>
> >> Especially 3+4 tend to be compile-time constants in the firmware as they
> >> are needed very early in the setup process.
> > 
> > So we don't need them in pci-config, just stick constant in ACPI.
> 
> I don't want them be constant.  I want allow the firmware pick them.
> Our mmconfig xbar is 256M and can handle 256 busses.  I'd like to have
> the option to reduce that to 64M and place it somewhere else.
> 
> Also coreboot and seabios use different values for pmbase.  coreboot on
> q35 maps the pmbase below 0x1000.  Which surely makes sense.  When we
> don't place chipset stuff at 0xb000 we can assign the 0xb000->0xbfff
> window to a pci bridge instead.

Yes, this might be useful. But I don't think it's required to
use linker to patch ACPI tables for this - we can write ASL code to read
the register back from device configuration, instead.

Also, keep qemu-devel Cc'd on these discussions please.

-- 
MST