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[Qemu-devel] [Bug 1211910] [NEW] Logical to linear address translation i
From: |
Nils Asmussen |
Subject: |
[Qemu-devel] [Bug 1211910] [NEW] Logical to linear address translation is wrong for 32-bit guests on a 64-bit hypervisor |
Date: |
Tue, 13 Aug 2013 17:52:22 -0000 |
Public bug reported:
I run a 64-bit hypervisor in qemu-system-x86_64 (without KVM) and on top of
that I have a 32-bit guest. The guest configures the code-segment to have a
base of 0x4000_0000 and a limit of 0xFFFF_FFFF with paging disabled. Thus, if a
logical address of e.g. 0xC000_0000 is used, it should be translated to
0x0000_0000 (linear and physical), because of the overflow that happens.
But this does not happen with the described setup. Instead, qemu seems to
calculate the logical to linear translation with 64-bit addresses so that no
overflow happens. Consequently, the resulting address is 0x1_0000_0000 and this
gets written to exitinfo2 in the VMCB structure. This causes trouble for
hypervisors that expect the upper 32 bits of exitinfo2 to be 0 for 32-bit
guests.
Note also that the exact same setup runs fine on real AMD machines with
SVM. That is, the upper 32 bits in exitinfo2 are always 0 because of the
overflow.
I've tested that with the latest development version of QEMU (commit
328465fd9f3a628ab320b5959d68d3d49df58fa6).
** Affects: qemu
Importance: Undecided
Status: New
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https://bugs.launchpad.net/bugs/1211910
Title:
Logical to linear address translation is wrong for 32-bit guests on a
64-bit hypervisor
Status in QEMU:
New
Bug description:
I run a 64-bit hypervisor in qemu-system-x86_64 (without KVM) and on top of
that I have a 32-bit guest. The guest configures the code-segment to have a
base of 0x4000_0000 and a limit of 0xFFFF_FFFF with paging disabled. Thus, if a
logical address of e.g. 0xC000_0000 is used, it should be translated to
0x0000_0000 (linear and physical), because of the overflow that happens.
But this does not happen with the described setup. Instead, qemu seems to
calculate the logical to linear translation with 64-bit addresses so that no
overflow happens. Consequently, the resulting address is 0x1_0000_0000 and this
gets written to exitinfo2 in the VMCB structure. This causes trouble for
hypervisors that expect the upper 32 bits of exitinfo2 to be 0 for 32-bit
guests.
Note also that the exact same setup runs fine on real AMD machines
with SVM. That is, the upper 32 bits in exitinfo2 are always 0 because
of the overflow.
I've tested that with the latest development version of QEMU (commit
328465fd9f3a628ab320b5959d68d3d49df58fa6).
To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1211910/+subscriptions
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