qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v2 2/2] hw/openrisc: avoid undefined shift in op


From: Jia Liu
Subject: Re: [Qemu-devel] [PATCH v2 2/2] hw/openrisc: avoid undefined shift in openrisc_pic_cpu_handler()
Date: Wed, 14 Aug 2013 21:17:48 +0800

Hi Xi,

On Wed, Aug 14, 2013 at 1:55 PM, Xi Wang <address@hidden> wrote:
> In C99 signed shift (1 << 31) is undefined behavior, since the result
> exceeds INT_MAX.  Use 1U instead and move the shift after the check.
>
> Cc: Jia Liu <address@hidden>
> Cc: Paolo Bonzini <address@hidden>
> Signed-off-by: Xi Wang <address@hidden>
> ---
>  hw/openrisc/pic_cpu.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c
> index 3fcee02..2af1d60 100644
> --- a/hw/openrisc/pic_cpu.c
> +++ b/hw/openrisc/pic_cpu.c
> @@ -26,12 +26,14 @@ static void openrisc_pic_cpu_handler(void *opaque, int 
> irq, int level)
>  {
>      OpenRISCCPU *cpu = (OpenRISCCPU *)opaque;
>      CPUState *cs = CPU(cpu);
> -    uint32_t irq_bit = 1 << irq;
> +    uint32_t irq_bit;
>
>      if (irq > 31 || irq < 0) {
>          return;
>      }
>
> +    irq_bit = 1U << irq;
> +

Thanks for making the code better.

Acked-by: Jia Liu <address@hidden>

>      if (level) {
>          cpu->env.picsr |= irq_bit;
>      } else {
> --
> 1.8.1.2
>

Regards,
Jia



reply via email to

[Prev in Thread] Current Thread [Next in Thread]