Re: [Qemu-devel] [PATCH] spapr-pci: rework MSI/MSIX

[Alexander Graf]

On 12.07.2013, at 08:38, Alexey Kardashevskiy wrote:

> On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAS
> hypercalls which return global IRQ numbers to a guest so it only
> operates with those and never touches MSIMessage.
> 
> Therefore MSIMessage handling is completely hidden in QEMU.
> 
> Previously every sPAPR PCI host bridge implemented its own MSI window
> to catch msi_notify()/msix_notify() calls from QEMU devices (virtio-pci
> or vfio) and route them to the guest via qemu_pulse_irq().
> MSIMessage used to be encoded as:
>       .addr - address within the PHB MSI window;
>       .data - the device index on PHB plus vector number.
> The MSI MR write function translated this MSIMessage to a global IRQ
> number and called qemu_pulse_irq().
> 
> However the total number of IRQs is not really big (at the moment it is
> 1024 IRQs starting from 4096) and even 16bit data field of MSIMessage
> seems to be enough to store an IRQ number there.
> 
> This simplifies MSI handling in sPAPR PHB. Specifically, this does:
> 1. remove a MSI window from a PHB;
> 2. add a single memory region for all MSIs to sPAPREnvironment
> and spapr_pci_msi_init() to initialize it;
> 3. encode MSIMessage as:
>    * .addr - a fixed address of SPAPR_PCI_MSI_WINDOW==0x40000000000ULL;
>    * .data as an IRQ number.
> 4. change IRQ allocator to align first IRQ number in a block for MSI.
> MSI uses lower bits to specify the vector number so the first IRQ has to
> be aligned. MSIX does not need any special allocator though.
> 
> Signed-off-by: Alexey Kardashevskiy <address@hidden>

Thanks, applied to ppc-next.


Alex