Re: [Qemu-devel] [PATCH v2] mips/malta: allow volatile writes to reset flash

[Aurelien Jarno]

On Wed, Aug 28, 2013 at 01:39:52PM +0100, Leon Alrae wrote:
> From: James Hogan <address@hidden>
> 
> Commit a427338 (mips_malta: correct reading MIPS revision at 0x1fc00010)
> altered the behaviour of the monitor flash mapping at the reset address
> by making it read only. However this causes data bus error exceptions
> when it is written to since it is effectively unassigned memory for
> writes. This isn't how the real hardware behaves. That memory can be
> written to (even with the MFWR jumper not fitted) and the new value read
> back from, but it doesn't get written back to the monitor flash so is
> volatile and may be lost after reading other parts of the flash.
> 
> This is fixed by making the bios copy ram writeable, but loaded via
> rom_add_blob_fixed() so that it it restored on reset. That's not as
> volatile as real hardware but should be good enough.

The bios is loaded in parallel flash, so it actually be written through
the CFI interface. Therefore the copy at 0x1fc00000 should not be
reloaded from the original copy on reset, but the too copies should be
kept consistent (except for address 0x1fc00010).

> Signed-off-by: James Hogan <address@hidden>
> Cc: Paul Burton <address@hidden>
> Cc: Leon Alrae <address@hidden>
> Cc: Aurelien Jarno <address@hidden>
> Cc: Andreas Färber <address@hidden>
> Signed-off-by: Leon Alrae <address@hidden>
> ---
> Changes in v2:
> - This fixes it slightly differently, but is cleaner I think. The bios
>   copy region is now writable, but is restored on reset. The revision ID
>   is now possible to overwrite (temporarily).
> 
>  hw/mips/mips_malta.c |   18 +++++++++++-------
>  1 files changed, 11 insertions(+), 7 deletions(-)
> 
> diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c
> index f8d064c..06e5b50 100644
> --- a/hw/mips/mips_malta.c
> +++ b/hw/mips/mips_malta.c
> @@ -905,6 +905,7 @@ void mips_malta_init(QEMUMachineInitArgs *args)
>      int fl_idx = 0;
>      int fl_sectors = bios_size >> 16;
>      int be;
> +    void *bios_start;
>  
>      DeviceState *dev = qdev_create(NULL, TYPE_MIPS_MALTA);
>      MaltaState *s = MIPS_MALTA(dev);
> @@ -1044,16 +1045,19 @@ void mips_malta_init(QEMUMachineInitArgs *args)
>       * regions are not executable.
>       */
>      memory_region_init_ram(bios_copy, NULL, "bios.1fc", BIOS_SIZE);
> -    if (!rom_copy(memory_region_get_ram_ptr(bios_copy),
> -                  FLASH_ADDRESS, BIOS_SIZE)) {
> -        memcpy(memory_region_get_ram_ptr(bios_copy),
> -               memory_region_get_ram_ptr(bios), BIOS_SIZE);
> -    }
> -    memory_region_set_readonly(bios_copy, true);
>      memory_region_add_subregion(system_memory, RESET_ADDRESS, bios_copy);
> +    bios_start = rom_ptr(FLASH_ADDRESS);
> +    if (!bios_start) {
> +        bios_start = memory_region_get_ram_ptr(bios);
> +        /* in case qtest_enabled() */
> +        if (bios_size < 0) {
> +            bios_size = BIOS_SIZE;
> +        }
> +    }
> +    rom_add_blob_fixed("bios.1fc", bios_start, bios_size, RESET_ADDRESS);
>  
>      /* Board ID = 0x420 (Malta Board with CoreLV) */
> -    stl_p(memory_region_get_ram_ptr(bios_copy) + 0x10, 0x00000420);
> +    stl_p(rom_ptr(RESET_ADDRESS + 0x10), 0x00000420);
>  
>      /* Init internal devices */
>      cpu_mips_irq_init_cpu(env);
> -- 
> 1.7.5.4
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
address@hidden                 http://www.aurel32.net