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Re: [Qemu-devel] [PATCH v5 19/21] configure: Add handling code for AArch
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v5 19/21] configure: Add handling code for AArch64 targets |
Date: |
Mon, 2 Sep 2013 18:03:40 +0100 |
On 2 September 2013 17:44, Peter Maydell <address@hidden> wrote:
> On 1 July 2013 18:35, Peter Maydell <address@hidden> wrote:
>> From: Alexander Graf <address@hidden>
>>
>> Add the necessary code to configure to handle AArch64 as a target
>> CPU (we already have some code for supporting it as host). Note
>> that this doesn't enable the AArch64 targets yet.
>> + aarch64)
>> + TARGET_BASE_ARCH=arm
>> + bflt="yes"
>> + target_nptl="yes"
>> + gdb_xml_files="aarch64-core.xml aarch64-fpu.xml"
>> + target_long_alignment=8
>
> This is a holdover from before Paolo cleaned up the ABI
> type alignment handling -- we need to add handling in
> abitypes.h now.
Except that the default abitypes.h code is correct for
AArch64, so no extra code required. I'll just drop that
line (and the equally out of date target_nptl="yes").
Aside: I wonder why we have
#ifdef TARGET_ARM
#define ABI_LLONG_ALIGNMENT 4
#endif
given that the ARM procedure calling standard says that
64 bit integers are 8 aligned, and gcc's __alignof__
agrees with that (gcc (Ubuntu/Linaro 4.7.2-2ubuntu1) 4.7.2)
Laurent's commit message from 2011 for
c2e3dee6e gives gcc output for ARM of "alignof(long long) 4"
so either that wasn't APCS or gcc was buggy...
-- PMM