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Re: [Qemu-devel] [RFC qom-cpu 19/41] cpu-exec: Change cpu_loop_exit() ar
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From: |
Jia Liu |
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Subject: |
Re: [Qemu-devel] [RFC qom-cpu 19/41] cpu-exec: Change cpu_loop_exit() argument to CPUState |
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Date: |
Wed, 4 Sep 2013 20:49:20 +0800 |
On Wed, Sep 4, 2013 at 5:04 PM, Andreas Färber <address@hidden> wrote:
> Signed-off-by: Andreas Färber <address@hidden>
> ---
> cpu-exec.c | 14 ++++++--------
> exec.c | 2 +-
> include/exec/exec-all.h | 2 +-
> target-alpha/helper.c | 4 ++--
> target-alpha/mem_helper.c | 4 ++--
> target-arm/op_helper.c | 6 +++---
> target-cris/op_helper.c | 4 ++--
> target-i386/excp_helper.c | 2 +-
> target-i386/misc_helper.c | 4 ++--
> target-i386/seg_helper.c | 2 +-
> target-i386/svm_helper.c | 8 ++++----
> target-lm32/op_helper.c | 6 +++---
> target-m68k/op_helper.c | 6 +++---
> target-microblaze/op_helper.c | 4 ++--
> target-mips/op_helper.c | 4 ++--
> target-moxie/helper.c | 6 +++---
> target-openrisc/exception.c | 2 +-
> target-openrisc/mmu_helper.c | 2 +-
> target-ppc/excp_helper.c | 2 +-
> target-s390x/cc_helper.c | 2 +-
> target-s390x/mem_helper.c | 6 +++---
> target-s390x/misc_helper.c | 10 +++++-----
> target-sh4/op_helper.c | 4 ++--
> target-sparc/helper.c | 6 +++---
> target-sparc/ldst_helper.c | 2 +-
> target-unicore32/op_helper.c | 4 ++--
> target-xtensa/op_helper.c | 4 ++--
> user-exec.c | 4 ++--
> 28 files changed, 62 insertions(+), 64 deletions(-)
>
> diff --git a/cpu-exec.c b/cpu-exec.c
> index 209380d..a1b8b96 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -23,10 +23,8 @@
> #include "qemu/atomic.h"
> #include "sysemu/qtest.h"
>
> -void cpu_loop_exit(CPUArchState *env)
> +void cpu_loop_exit(CPUState *cpu)
> {
> - CPUState *cpu = ENV_GET_CPU(env);
> -
> cpu->current_tb = NULL;
> siglongjmp(cpu->jmp_env, 1);
> }
> @@ -305,7 +303,7 @@ int cpu_exec(CPUArchState *env)
> if (interrupt_request & CPU_INTERRUPT_DEBUG) {
> cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
> cpu->exception_index = EXCP_DEBUG;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cpu);
> }
> #if defined(TARGET_ARM) || defined(TARGET_SPARC) || defined(TARGET_MIPS) || \
> defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \
> @@ -314,7 +312,7 @@ int cpu_exec(CPUArchState *env)
> cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
> cpu->halted = 1;
> cpu->exception_index = EXCP_HLT;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cpu);
> }
> #endif
> #if defined(TARGET_I386)
> @@ -329,7 +327,7 @@ int cpu_exec(CPUArchState *env)
> 0);
> do_cpu_init(x86_env_get_cpu(env));
> cpu->exception_index = EXCP_HALTED;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cpu);
> } else if (interrupt_request & CPU_INTERRUPT_SIPI) {
> do_cpu_sipi(x86_env_get_cpu(env));
> } else if (env->hflags2 & HF2_GIF_MASK) {
> @@ -578,7 +576,7 @@ int cpu_exec(CPUArchState *env)
> if (unlikely(cpu->exit_request)) {
> cpu->exit_request = 0;
> cpu->exception_index = EXCP_INTERRUPT;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cpu);
> }
> #if defined(DEBUG_DISAS)
> if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
> @@ -665,7 +663,7 @@ int cpu_exec(CPUArchState *env)
> }
> cpu->exception_index = EXCP_INTERRUPT;
> next_tb = 0;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cpu);
> }
> break;
> }
> diff --git a/exec.c b/exec.c
> index 6ae5a21..06fb881 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -1483,7 +1483,7 @@ static void check_watchpoint(int offset, int len_mask,
> int flags)
> tb_check_watchpoint(env);
> if (wp->flags & BP_STOP_BEFORE_ACCESS) {
> cpu->exception_index = EXCP_DEBUG;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cpu);
> } else {
> cc->get_tb_cpu_state(cpu, &pc, &cs_base, &cpu_flags);
> tb_gen_code(env, pc, cs_base, cpu_flags, 1);
> diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
> index 4429924..f6b9eac 100644
> --- a/include/exec/exec-all.h
> +++ b/include/exec/exec-all.h
> @@ -88,7 +88,7 @@ TranslationBlock *tb_gen_code(CPUArchState *env,
> target_ulong pc, target_ulong cs_base, int
> flags,
> int cflags);
> void cpu_exec_init(CPUArchState *env);
> -void QEMU_NORETURN cpu_loop_exit(CPUArchState *env1);
> +void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
> int page_unprotect(target_ulong address, uintptr_t pc, void *puc);
> void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
> int is_cpu_write_access);
> diff --git a/target-alpha/helper.c b/target-alpha/helper.c
> index 6f103ec..41a1394 100644
> --- a/target-alpha/helper.c
> +++ b/target-alpha/helper.c
> @@ -512,7 +512,7 @@ void QEMU_NORETURN helper_excp(CPUAlphaState *env, int
> excp, int error)
>
> cs->exception_index = excp;
> env->error_code = error;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> /* This may be called from any of the helpers to set up EXCEPTION_INDEX. */
> @@ -527,7 +527,7 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env,
> uintptr_t retaddr,
> if (retaddr) {
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void QEMU_NORETURN arith_excp(CPUAlphaState *env, uintptr_t retaddr,
> diff --git a/target-alpha/mem_helper.c b/target-alpha/mem_helper.c
> index c6c0182..c2bd64a 100644
> --- a/target-alpha/mem_helper.c
> +++ b/target-alpha/mem_helper.c
> @@ -108,7 +108,7 @@ static void do_unaligned_access(CPUAlphaState *env,
> target_ulong addr,
> env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
> cs->exception_index = EXCP_UNALIGN;
> env->error_code = 0;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
> @@ -158,7 +158,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write,
> cpu_restore_state(env, retaddr);
> }
> /* Exception index and error code are already set */
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
> #endif /* CONFIG_USER_ONLY */
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index d05f522..552ca3d 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -28,7 +28,7 @@ static void raise_exception(CPUARMState *env, int tt)
> CPUState *cs = CPU(cpu);
>
> cs->exception_index = tt;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def,
> @@ -229,7 +229,7 @@ void HELPER(wfi)(CPUARMState *env)
>
> cs->exception_index = EXCP_HLT;
> cs->halted = 1;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void HELPER(exception)(CPUARMState *env, uint32_t excp)
> @@ -237,7 +237,7 @@ void HELPER(exception)(CPUARMState *env, uint32_t excp)
> CPUState *cs = CPU(arm_env_get_cpu(env));
>
> cs->exception_index = excp;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> uint32_t HELPER(cpsr_read)(CPUARMState *env)
> diff --git a/target-cris/op_helper.c b/target-cris/op_helper.c
> index 68a5caa..d80b6c9 100644
> --- a/target-cris/op_helper.c
> +++ b/target-cris/op_helper.c
> @@ -72,7 +72,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> helper_top_evaluate_flags(env);
> }
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
>
> @@ -83,7 +83,7 @@ void helper_raise_exception(CPUCRISState *env, uint32_t
> index)
> CPUState *cs = CPU(cris_env_get_cpu(env));
>
> cs->exception_index = index;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_tlb_flush_pid(CPUCRISState *env, uint32_t pid)
> diff --git a/target-i386/excp_helper.c b/target-i386/excp_helper.c
> index ec76eba..f337fd2 100644
> --- a/target-i386/excp_helper.c
> +++ b/target-i386/excp_helper.c
> @@ -108,7 +108,7 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State
> *env, int intno,
> env->error_code = error_code;
> env->exception_is_int = is_int;
> env->exception_next_eip = env->eip + next_eip_addend;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> /* shortcuts to generate exceptions */
> diff --git a/target-i386/misc_helper.c b/target-i386/misc_helper.c
> index a058c43..4b7a142 100644
> --- a/target-i386/misc_helper.c
> +++ b/target-i386/misc_helper.c
> @@ -574,7 +574,7 @@ static void do_hlt(X86CPU *cpu)
> env->hflags &= ~HF_INHIBIT_IRQ_MASK; /* needed if sti is just before */
> cs->halted = 1;
> cs->exception_index = EXCP_HLT;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_hlt(CPUX86State *env, int next_eip_addend)
> @@ -623,5 +623,5 @@ void helper_debug(CPUX86State *env)
> CPUState *cs = CPU(x86_env_get_cpu(env));
>
> cs->exception_index = EXCP_DEBUG;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
> index b689e94..d030793 100644
> --- a/target-i386/seg_helper.c
> +++ b/target-i386/seg_helper.c
> @@ -939,7 +939,7 @@ void helper_syscall(CPUX86State *env, int next_eip_addend)
>
> cs->exception_index = EXCP_SYSCALL;
> env->exception_next_eip = env->eip + next_eip_addend;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> #else
> void helper_syscall(CPUX86State *env, int next_eip_addend)
> diff --git a/target-i386/svm_helper.c b/target-i386/svm_helper.c
> index 3c12cb8..fbf8359 100644
> --- a/target-i386/svm_helper.c
> +++ b/target-i386/svm_helper.c
> @@ -305,7 +305,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int
> next_eip_addend)
> env->exception_is_int = 0;
> env->exception_next_eip = env->eip;
> qemu_log_mask(CPU_LOG_TB_IN_ASM, "NMI");
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> break;
> case SVM_EVTINJ_TYPE_EXEPT:
> cs->exception_index = vector;
> @@ -313,7 +313,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int
> next_eip_addend)
> env->exception_is_int = 0;
> env->exception_next_eip = -1;
> qemu_log_mask(CPU_LOG_TB_IN_ASM, "EXEPT");
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> break;
> case SVM_EVTINJ_TYPE_SOFT:
> cs->exception_index = vector;
> @@ -321,7 +321,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int
> next_eip_addend)
> env->exception_is_int = 1;
> env->exception_next_eip = env->eip;
> qemu_log_mask(CPU_LOG_TB_IN_ASM, "SOFT");
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> break;
> }
> qemu_log_mask(CPU_LOG_TB_IN_ASM, " %#x %#x\n", cs->exception_index,
> @@ -710,7 +710,7 @@ void helper_vmexit(CPUX86State *env, uint32_t exit_code,
> uint64_t exit_info_1)
> env->error_code = 0;
> env->old_exception = -1;
>
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1)
> diff --git a/target-lm32/op_helper.c b/target-lm32/op_helper.c
> index d4ee1ba..acf2412 100644
> --- a/target-lm32/op_helper.c
> +++ b/target-lm32/op_helper.c
> @@ -24,7 +24,7 @@ void HELPER(raise_exception)(CPULM32State *env, uint32_t
> index)
> CPUState *cs = CPU(lm32_env_get_cpu(env));
>
> cs->exception_index = index;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void HELPER(hlt)(CPULM32State *env)
> @@ -33,7 +33,7 @@ void HELPER(hlt)(CPULM32State *env)
>
> cs->halted = 1;
> cs->exception_index = EXCP_HLT;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void HELPER(wcsr_im)(CPULM32State *env, uint32_t im)
> @@ -94,7 +94,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> /* now we have a real cpu fault */
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
> #endif
> diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
> index 9ad3a9d..6ab1927 100644
> --- a/target-m68k/op_helper.c
> +++ b/target-m68k/op_helper.c
> @@ -67,7 +67,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> /* now we have a real cpu fault */
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
>
> @@ -114,7 +114,7 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
> }
> cs->halted = 1;
> cs->exception_index = EXCP_HLT;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> return;
> }
> if (cs->exception_index >= EXCP_TRAP0
> @@ -170,7 +170,7 @@ static void raise_exception(CPUM68KState *env, int tt)
> CPUState *cs = CPU(m68k_env_get_cpu(env));
>
> cs->exception_index = tt;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt)
> diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c
> index 9e39411..f476132 100644
> --- a/target-microblaze/op_helper.c
> +++ b/target-microblaze/op_helper.c
> @@ -56,7 +56,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> /* now we have a real cpu fault */
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
> #endif
> @@ -101,7 +101,7 @@ void helper_raise_exception(CPUMBState *env, uint32_t
> index)
> CPUState *cs = CPU(mb_env_get_cpu(env));
>
> cs->exception_index = index;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_debug(CPUMBState *env)
> diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
> index 7208659..0e0c540 100644
> --- a/target-mips/op_helper.c
> +++ b/target-mips/op_helper.c
> @@ -51,7 +51,7 @@ static inline void QEMU_NORETURN
> do_raise_exception_err(CPUMIPSState *env,
> cpu_restore_state(env, pc);
> }
>
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env,
> @@ -280,7 +280,7 @@ static inline hwaddr do_translate_address(CPUMIPSState
> *env,
> lladdr = cpu_mips_translate_address(env, address, rw);
>
> if (lladdr == -1LL) {
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(mips_env_get_cpu(env)));
> } else {
> return lladdr;
> }
> diff --git a/target-moxie/helper.c b/target-moxie/helper.c
> index 06a4c72..3994c09 100644
> --- a/target-moxie/helper.c
> +++ b/target-moxie/helper.c
> @@ -59,7 +59,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> cpu_restore_state(env, retaddr);
> }
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_raise_exception(CPUMoxieState *env, int ex)
> @@ -74,7 +74,7 @@ void helper_raise_exception(CPUMoxieState *env, int ex)
> env->sregs[5] = env->pc;
> /* Jump the the exception handline routine. */
> env->pc = env->sregs[1];
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
> @@ -104,7 +104,7 @@ void helper_debug(CPUMoxieState *env)
> CPUState *cs = CPU(moxie_env_get_cpu(env));
>
> cs->exception_index = EXCP_DEBUG;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> #if defined(CONFIG_USER_ONLY)
> diff --git a/target-openrisc/exception.c b/target-openrisc/exception.c
> index b96f3f8..74652a5 100644
> --- a/target-openrisc/exception.c
> +++ b/target-openrisc/exception.c
> @@ -25,5 +25,5 @@ void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu,
> uint32_t excp)
> CPUState *cs = CPU(cpu);
>
> cs->exception_index = excp;
> - cpu_loop_exit(&cpu->env);
> + cpu_loop_exit(cs);
> }
> diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
> index e3fe6c7..5f7f6f5 100644
> --- a/target-openrisc/mmu_helper.c
> +++ b/target-openrisc/mmu_helper.c
> @@ -52,7 +52,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
> cpu_restore_state(env, retaddr);
> }
> /* Raise Exception. */
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
> #endif
> diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c
> index 0ec2615..7ced42d 100644
> --- a/target-ppc/excp_helper.c
> +++ b/target-ppc/excp_helper.c
> @@ -816,7 +816,7 @@ void helper_raise_exception_err(CPUPPCState *env,
> uint32_t exception,
> #endif
> cs->exception_index = exception;
> env->error_code = error_code;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_raise_exception(CPUPPCState *env, uint32_t exception)
> diff --git a/target-s390x/cc_helper.c b/target-s390x/cc_helper.c
> index a6d60bf..d845f20 100644
> --- a/target-s390x/cc_helper.c
> +++ b/target-s390x/cc_helper.c
> @@ -548,7 +548,7 @@ uint32_t HELPER(calc_cc)(CPUS390XState *env, uint32_t
> cc_op, uint64_t src,
> void HELPER(load_psw)(CPUS390XState *env, uint64_t mask, uint64_t addr)
> {
> load_psw(env, mask, addr);
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(s390_env_get_cpu(env)));
> }
>
> void HELPER(sacf)(CPUS390XState *env, uint64_t a1)
> diff --git a/target-s390x/mem_helper.c b/target-s390x/mem_helper.c
> index 8bd131b..44a5557 100644
> --- a/target-s390x/mem_helper.c
> +++ b/target-s390x/mem_helper.c
> @@ -58,7 +58,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> /* now we have a real cpu fault */
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
>
> @@ -970,12 +970,12 @@ static uint32_t mvc_asc(CPUS390XState *env, int64_t l,
> uint64_t a1,
> }
>
> if (mmu_translate(env, a1 & TARGET_PAGE_MASK, 1, mode1, &dest, &flags)) {
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(s390_env_get_cpu(env)));
> }
> dest |= a1 & ~TARGET_PAGE_MASK;
>
> if (mmu_translate(env, a2 & TARGET_PAGE_MASK, 0, mode2, &src, &flags)) {
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(s390_env_get_cpu(env)));
> }
> src |= a2 & ~TARGET_PAGE_MASK;
>
> diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
> index b6bd16f..2b1aa83 100644
> --- a/target-s390x/misc_helper.c
> +++ b/target-s390x/misc_helper.c
> @@ -60,7 +60,7 @@ void QEMU_NORETURN runtime_exception(CPUS390XState *env,
> int excp,
> env->int_pgm_ilen = t = get_ilen(t);
> env->psw.addr += 2 * t;
>
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> /* Raise an exception statically from a TB. */
> @@ -70,7 +70,7 @@ void HELPER(exception)(CPUS390XState *env, uint32_t excp)
>
> HELPER_LOG("%s: exception %d\n", __func__, excp);
> cs->exception_index = excp;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> #ifndef CONFIG_USER_ONLY
> @@ -172,7 +172,7 @@ void program_interrupt(CPUS390XState *env, uint32_t code,
> int ilen)
> env->int_pgm_code = code;
> env->int_pgm_ilen = ilen;
> cs->exception_index = EXCP_PGM;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
>
> @@ -509,11 +509,11 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t
> order_code, uint32_t r1,
> #if !defined(CONFIG_USER_ONLY)
> case SIGP_RESTART:
> qemu_system_reset_request();
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(s390_env_get_cpu(env)));
> break;
> case SIGP_STOP:
> qemu_system_shutdown_request();
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(s390_env_get_cpu(env)));
> break;
> #endif
> default:
> diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c
> index 6e527cf..271401f 100644
> --- a/target-sh4/op_helper.c
> +++ b/target-sh4/op_helper.c
> @@ -52,7 +52,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> if (retaddr) {
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
>
> @@ -77,7 +77,7 @@ static inline void QEMU_NORETURN
> raise_exception(CPUSH4State *env, int index,
> if (retaddr) {
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_raise_illegal_instruction(CPUSH4State *env)
> diff --git a/target-sparc/helper.c b/target-sparc/helper.c
> index a393ef0..fb5f6ec 100644
> --- a/target-sparc/helper.c
> +++ b/target-sparc/helper.c
> @@ -27,7 +27,7 @@ void helper_raise_exception(CPUSPARCState *env, int tt)
> CPUState *cs = CPU(sparc_env_get_cpu(env));
>
> cs->exception_index = tt;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void helper_debug(CPUSPARCState *env)
> @@ -35,7 +35,7 @@ void helper_debug(CPUSPARCState *env)
> CPUState *cs = CPU(sparc_env_get_cpu(env));
>
> cs->exception_index = EXCP_DEBUG;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> #ifdef TARGET_SPARC64
> @@ -239,6 +239,6 @@ void helper_power_down(CPUSPARCState *env)
> cs->exception_index = EXCP_HLT;
> env->pc = env->npc;
> env->npc = env->pc + 4;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> #endif
> diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
> index 973fcb6..65ce724 100644
> --- a/target-sparc/ldst_helper.c
> +++ b/target-sparc/ldst_helper.c
> @@ -2443,7 +2443,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write, int mmu_idx,
> if (retaddr) {
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
> #endif
> diff --git a/target-unicore32/op_helper.c b/target-unicore32/op_helper.c
> index 3efc6a8..c2bf834 100644
> --- a/target-unicore32/op_helper.c
> +++ b/target-unicore32/op_helper.c
> @@ -19,7 +19,7 @@ void HELPER(exception)(CPUUniCore32State *env, uint32_t
> excp)
> CPUState *cs = CPU(uc32_env_get_cpu(env));
>
> cs->exception_index = excp;
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> static target_ulong asr_read(CPUUniCore32State *env)
> @@ -271,7 +271,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
> is_write,
> /* now we have a real cpu fault */
> cpu_restore_state(env, retaddr);
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
> }
> #endif
> diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
> index cc1d5e2..17d7f35 100644
> --- a/target-xtensa/op_helper.c
> +++ b/target-xtensa/op_helper.c
> @@ -104,7 +104,7 @@ void HELPER(exception)(CPUXtensaState *env, uint32_t excp)
> if (excp == EXCP_DEBUG) {
> env->exception_taken = 0;
> }
> - cpu_loop_exit(env);
> + cpu_loop_exit(cs);
> }
>
> void HELPER(exception_cause)(CPUXtensaState *env, uint32_t pc, uint32_t
> cause)
> @@ -390,7 +390,7 @@ void HELPER(waiti)(CPUXtensaState *env, uint32_t pc,
> uint32_t intlevel)
> (intlevel << PS_INTLEVEL_SHIFT);
> check_interrupts(env);
> if (env->pending_irq_level) {
> - cpu_loop_exit(env);
> + cpu_loop_exit(CPU(xtensa_env_get_cpu(env)));
> return;
> }
>
> diff --git a/user-exec.c b/user-exec.c
> index dbb9c8d..e149c97 100644
> --- a/user-exec.c
> +++ b/user-exec.c
> @@ -40,12 +40,12 @@
>
> static void exception_action(CPUArchState *env1)
> {
> -#if defined(TARGET_I386)
> CPUState *cpu = ENV_GET_CPU(env1);
>
> +#if defined(TARGET_I386)
> raise_exception_err(env1, cpu->exception_index, env1->error_code);
> #else
> - cpu_loop_exit(env1);
> + cpu_loop_exit(cpu);
> #endif
> }
target-openrisc: Tested-by: Jia Liu <address@hidden>
>
> --
> 1.8.1.4
>
- [Qemu-devel] [RFC qom-cpu 13/41] cpu: Drop cpu_model_str from CPU_COMMON, (continued)
- [Qemu-devel] [RFC qom-cpu 13/41] cpu: Drop cpu_model_str from CPU_COMMON, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 14/41] cpu: Move opaque field from CPU_COMMON to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 15/41] cpu: Move watchpoint fields from CPU_COMMON to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 16/41] cpu: Move breakpoints field from CPU_COMMON to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 17/41] cpu: Move tlb_flush_{addr, mask} fields from CPU_COMMON_TLB to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 18/41] exec: Change tlb_fill() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 19/41] cpu-exec: Change cpu_loop_exit() argument to CPUState, Andreas Färber, 2013/09/04
- Re: [Qemu-devel] [RFC qom-cpu 19/41] cpu-exec: Change cpu_loop_exit() argument to CPUState,
Jia Liu <=
- [Qemu-devel] [RFC qom-cpu 23/41] translate-all: Change cpu_io_recompile() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 20/41] translate-all: Change cpu_restore_state() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 21/41] translate-all: Change cpu_restore_state_from_tb() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 22/41] translate-all: Change tb_check_watchpoint() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 26/41] target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 25/41] translate-all: Change tb_flush_jmp_cache() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 28/41] exec: Change cpu_breakpoint_{insert, remove{, _by_ref, _all}} argument, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 30/41] cputlb: Change tlb_update_dirty() argument to CPUState, Andreas Färber, 2013/09/04
- [Qemu-devel] [RFC qom-cpu 24/41] translate-all: Change tb_gen_code() argument to CPUState, Andreas Färber, 2013/09/04