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[Qemu-devel] [PATCH 13/19] tcg-ia64 Introduce tcg_opc_bswap64_i
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From: |
Richard Henderson |
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Subject: |
[Qemu-devel] [PATCH 13/19] tcg-ia64 Introduce tcg_opc_bswap64_i |
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Date: |
Thu, 5 Sep 2013 23:50:35 -0700 |
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/ia64/tcg-target.c | 63 +++++++++++++++++++++++----------------------------
1 file changed, 28 insertions(+), 35 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 6c95920..3c177c6 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -1406,12 +1406,17 @@ static inline void tcg_out_ext(TCGContext *s, uint64_t
opc_i29,
tcg_opc_i29(TCG_REG_P0, opc_i29, ret, arg));
}
+static inline uint64_t tcg_opc_bswap64_i(int qp, TCGReg d, TCGReg s)
+{
+ return tcg_opc_i3(qp, OPC_MUX1_I3, d, s, 0xb);
+}
+
static inline void tcg_out_bswap16(TCGContext *s, TCGArg ret, TCGArg arg)
{
tcg_out_bundle(s, mII,
INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 15, 15),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, ret, ret, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, ret, ret));
}
static inline void tcg_out_bswap32(TCGContext *s, TCGArg ret, TCGArg arg)
@@ -1419,7 +1424,7 @@ static inline void tcg_out_bswap32(TCGContext *s, TCGArg
ret, TCGArg arg)
tcg_out_bundle(s, mII,
INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12, ret, arg, 31, 31),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, ret, ret, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, ret, ret));
}
static inline void tcg_out_bswap64(TCGContext *s, TCGArg ret, TCGArg arg)
@@ -1427,7 +1432,7 @@ static inline void tcg_out_bswap64(TCGContext *s, TCGArg
ret, TCGArg arg)
tcg_out_bundle(s, miI,
INSN_NOP_M,
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3, ret, arg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, ret, arg));
}
static inline void tcg_out_deposit(TCGContext *s, TCGArg ret, TCGArg a1,
@@ -1665,8 +1670,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
} else {
tcg_out_bundle(s, miB,
tcg_opc_movi_a(TCG_REG_P7, TCG_REG_R58, mem_index),
- tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3,
- TCG_REG_R8, TCG_REG_R8, 0xb),
+ tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R8, TCG_REG_R8),
tcg_opc_b5 (TCG_REG_P7, OPC_BR_CALL_SPTK_MANY_B5,
TCG_REG_B0, TCG_REG_B6));
}
@@ -1740,8 +1744,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args,
tcg_out_bundle(s, miI,
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg),
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3,
- TCG_REG_R2, TCG_REG_R2, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R2, TCG_REG_R2));
data_reg = TCG_REG_R2;
break;
@@ -1755,8 +1758,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args,
tcg_out_bundle(s, miI,
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg),
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3,
- TCG_REG_R2, TCG_REG_R2, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R2, TCG_REG_R2));
data_reg = TCG_REG_R2;
break;
@@ -1765,8 +1767,7 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args,
tcg_opc_m1 (TCG_REG_P7, OPC_LD8_M1,
TCG_REG_R1, TCG_REG_R2),
tcg_opc_mov_a(TCG_REG_P7, TCG_REG_R58, data_reg),
- tcg_opc_i3 (TCG_REG_P6, OPC_MUX1_I3,
- TCG_REG_R2, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P6, TCG_REG_R2, data_reg));
data_reg = TCG_REG_R2;
break;
@@ -1833,8 +1834,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
tcg_opc_m1 (TCG_REG_P0, opc_ld_m1[s_bits],
data_reg, TCG_REG_R2),
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- data_reg, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
} else {
if (s_bits == MO_16) {
tcg_out_bundle(s, mII,
@@ -1855,13 +1855,11 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
tcg_out_bundle(s, miI,
INSN_NOP_M,
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- data_reg, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
} else {
tcg_out_bundle(s, mII,
INSN_NOP_M,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- data_reg, data_reg, 0xb),
+ tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg),
tcg_opc_ext_i(TCG_REG_P0, opc, data_reg, data_reg));
}
}
@@ -1886,21 +1884,18 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const
TCGArg *args,
INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
data_reg, data_reg, 15, 15),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- data_reg, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
} else if (bswap && s_bits == MO_32) {
tcg_out_bundle(s, mII,
INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
data_reg, data_reg, 31, 31),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- data_reg, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
} else if (bswap && s_bits == MO_64) {
tcg_out_bundle(s, miI,
INSN_NOP_M,
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- data_reg, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, data_reg, data_reg));
}
if (opc & MO_SIGN) {
tcg_out_bundle(s, miI,
@@ -1950,23 +1945,22 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args,
INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 15, 15),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- TCG_REG_R3, TCG_REG_R3, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0,
+ TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3;
} else if (s_bits == MO_32) {
tcg_out_bundle(s, mII,
INSN_NOP_M,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 31, 31),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- TCG_REG_R3, TCG_REG_R3, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0,
+ TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3;
} else if (s_bits == MO_64) {
tcg_out_bundle(s, miI,
INSN_NOP_M,
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- TCG_REG_R3, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3,
data_reg));
data_reg = TCG_REG_R3;
}
}
@@ -1996,23 +1990,22 @@ static inline void tcg_out_qemu_st(TCGContext *s, const
TCGArg *args,
add_guest_base,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 15, 15),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- TCG_REG_R3, TCG_REG_R3, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0,
+ TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3;
} else if (s_bits == MO_32) {
tcg_out_bundle(s, mII,
add_guest_base,
tcg_opc_i12(TCG_REG_P0, OPC_DEP_Z_I12,
TCG_REG_R3, data_reg, 31, 31),
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- TCG_REG_R3, TCG_REG_R3, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0,
+ TCG_REG_R3, TCG_REG_R3));
data_reg = TCG_REG_R3;
} else if (s_bits == MO_64) {
tcg_out_bundle(s, miI,
add_guest_base,
INSN_NOP_I,
- tcg_opc_i3 (TCG_REG_P0, OPC_MUX1_I3,
- TCG_REG_R3, data_reg, 0xb));
+ tcg_opc_bswap64_i(TCG_REG_P0, TCG_REG_R3,
data_reg));
data_reg = TCG_REG_R3;
}
tcg_out_bundle(s, miI,
--
1.8.3.1
- [Qemu-devel] [PATCH 04/19] tcg-ia64: Simplify brcond, (continued)
- [Qemu-devel] [PATCH 04/19] tcg-ia64: Simplify brcond, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 03/19] tcg-ia64: Handle constant calls, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 05/19] tcg-ia64: Move AREG0 to R32, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 06/19] tcg-ia64: Avoid unnecessary stop bit in tcg_out_alu, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 08/19] tcg-ia64: Use SUB_A3 and ADDS_A4 for subtraction, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 07/19] tcg-ia64: Use ADDS for small addition, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 09/19] tcg-ia64: Use A3 form of logical operations, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 10/19] tcg-ia64 Introduce tcg_opc_mov_a, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 11/19] tcg-ia64 Introduce tcg_opc_movi_a, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 12/19] tcg-ia64 Introduce tcg_opc_ext_i, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 13/19] tcg-ia64 Introduce tcg_opc_bswap64_i,
Richard Henderson <=
- [Qemu-devel] [PATCH 14/19] tcg-ia64: Re-bundle the tlb load, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 15/19] tcg-ia64: Move bswap for store into tlb load, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 16/19] tcg-ia64: Move tlb addend load into tlb read, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 17/19] tcg-i64: Reduce code duplication in tcg_out_qemu_ld, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 18/19] tcg-ia64: Convert to new ldst helpers, Richard Henderson, 2013/09/06
- [Qemu-devel] [PATCH 19/19] tcg-ia64: Move part of softmmu slow path out of line, Richard Henderson, 2013/09/06