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Re: [Qemu-devel] [PATCH 2/5] hw: arm_gic: Introduce GIC_SET_PRIORITY mac
From: |
Christoffer Dall |
Subject: |
Re: [Qemu-devel] [PATCH 2/5] hw: arm_gic: Introduce GIC_SET_PRIORITY macro |
Date: |
Thu, 12 Sep 2013 23:47:02 -0700 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Sun, Aug 25, 2013 at 04:37:44PM +0100, Alexander Graf wrote:
>
> On 23.08.2013, at 21:10, Christoffer Dall wrote:
>
> > To make the code slightly cleaner to look at and make the save/restore
> > code easier to understand, introduce this macro to set the priority of
> > interrupts.
> >
> > Signed-off-by: Christoffer Dall <address@hidden>
> > ---
> > hw/intc/arm_gic.c | 6 +-----
> > hw/intc/gic_internal.h | 6 ++++++
> > 2 files changed, 7 insertions(+), 5 deletions(-)
> >
> > diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> > index bff3f9e..a7bb528 100644
> > --- a/hw/intc/arm_gic.c
> > +++ b/hw/intc/arm_gic.c
> > @@ -444,11 +444,7 @@ static void gic_dist_writeb(void *opaque, hwaddr
> > offset,
> > irq = (offset - 0x400) + GIC_BASE_IRQ;
> > if (irq >= s->num_irq)
> > goto bad_reg;
> > - if (irq < GIC_INTERNAL) {
> > - s->priority1[irq][cpu] = value;
> > - } else {
> > - s->priority2[irq - GIC_INTERNAL] = value;
> > - }
> > + GIC_SET_PRIORITY(irq, cpu, value);
> > } else if (offset < 0xc00) {
> > /* Interrupt CPU Target. RAZ/WI on uniprocessor GICs, with the
> > * annoying exception of the 11MPCore's GIC.
> > diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h
> > index 1426437..d835aa1 100644
> > --- a/hw/intc/gic_internal.h
> > +++ b/hw/intc/gic_internal.h
> > @@ -57,6 +57,12 @@
> > #define GIC_GET_PRIORITY(irq, cpu) (((irq) < GIC_INTERNAL) ? \
> > s->priority1[irq][cpu] : \
> > s->priority2[(irq) - GIC_INTERNAL])
> > +#define GIC_SET_PRIORITY(irq, cpu, val) do { \
> > + uint8_t *__x = ((irq) < GIC_INTERNAL) ? \
> > + &s->priority1[irq][cpu] : \
> > + &s->priority2[(irq) - GIC_INTERNAL]; \
> > + *__x = val; \
> > +} while (0)
>
> Why not make this a function?
>
Ah, you're no fun anymore. ok.
-Christoffer
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