[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [RFC 01/16] tcg: Change tcg_global_mem_new_* to take a TCGv
|
From: |
Richard Henderson |
|
Subject: |
[Qemu-devel] [RFC 01/16] tcg: Change tcg_global_mem_new_* to take a TCGv_ptr |
|
Date: |
Thu, 19 Sep 2013 14:24:53 -0700 |
Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.
Signed-off-by: Richard Henderson <address@hidden>
---
target-alpha/translate.c | 40 +++++++++++----------
target-arm/translate.c | 20 +++++------
target-cris/translate.c | 24 ++++++-------
target-cris/translate_v10.c | 82 +++++++++++++++++++++----------------------
target-i386/translate.c | 56 ++++++++++++++---------------
target-lm32/translate.c | 24 ++++++-------
target-m68k/translate.c | 28 ++++++++-------
target-microblaze/translate.c | 14 ++++----
target-mips/translate.c | 25 ++++++-------
target-moxie/translate.c | 8 ++---
target-openrisc/translate.c | 26 +++++++-------
target-ppc/translate.c | 40 ++++++++++-----------
target-s390x/translate.c | 16 ++++-----
target-sh4/translate.c | 36 +++++++++----------
target-sparc/translate.c | 60 ++++++++++++++++---------------
target-unicore32/translate.c | 2 +-
target-xtensa/translate.c | 10 +++---
tcg/tcg.c | 21 +++--------
tcg/tcg.h | 38 +++++++++++++++-----
19 files changed, 296 insertions(+), 274 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 28ce436..4c92ce5 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -108,35 +108,39 @@ void alpha_translate_init(void)
p = cpu_reg_names;
for (i = 0; i < 31; i++) {
sprintf(p, "ir%d", i);
- cpu_ir[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_ir[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUAlphaState, ir[i]), p);
p += (i < 10) ? 4 : 5;
sprintf(p, "fir%d", i);
- cpu_fir[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_fir[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUAlphaState, fir[i]),
p);
p += (i < 10) ? 5 : 6;
}
- cpu_pc = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUAlphaState, pc), "pc");
- cpu_lock_addr = tcg_global_mem_new_i64(TCG_AREG0,
- offsetof(CPUAlphaState, lock_addr),
- "lock_addr");
- cpu_lock_st_addr = tcg_global_mem_new_i64(TCG_AREG0,
- offsetof(CPUAlphaState,
lock_st_addr),
- "lock_st_addr");
- cpu_lock_value = tcg_global_mem_new_i64(TCG_AREG0,
- offsetof(CPUAlphaState, lock_value),
- "lock_value");
-
- cpu_unique = tcg_global_mem_new_i64(TCG_AREG0,
- offsetof(CPUAlphaState, unique),
"unique");
+ cpu_lock_addr = tcg_global_mem_new_i64(cpu_env,
+ offsetof(CPUAlphaState, lock_addr),
+ "lock_addr");
+ cpu_lock_st_addr = tcg_global_mem_new_i64(cpu_env,
+ offsetof(CPUAlphaState,
+ lock_st_addr),
+ "lock_st_addr");
+ cpu_lock_value = tcg_global_mem_new_i64(cpu_env,
+ offsetof(CPUAlphaState,
+ lock_value),
+ "lock_value");
+
+ cpu_unique = tcg_global_mem_new_i64(cpu_env,
+ offsetof(CPUAlphaState, unique),
+ "unique");
#ifndef CONFIG_USER_ONLY
- cpu_sysval = tcg_global_mem_new_i64(TCG_AREG0,
- offsetof(CPUAlphaState, sysval),
"sysval");
- cpu_usp = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_sysval = tcg_global_mem_new_i64(cpu_env,
+ offsetof(CPUAlphaState, sysval),
+ "sysval");
+ cpu_usp = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUAlphaState, usp), "usp");
#endif
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 998bde2..5fb38ca 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -92,25 +92,25 @@ void arm_translate_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < 16; i++) {
- cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, regs[i]),
regnames[i]);
}
- cpu_CF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, CF),
"CF");
- cpu_NF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, NF),
"NF");
- cpu_VF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, VF),
"VF");
- cpu_ZF = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUARMState, ZF),
"ZF");
+ cpu_CF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, CF), "CF");
+ cpu_NF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, NF), "NF");
+ cpu_VF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, VF), "VF");
+ cpu_ZF = tcg_global_mem_new_i32(cpu_env, offsetof(CPUARMState, ZF), "ZF");
- cpu_exclusive_addr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_exclusive_addr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, exclusive_addr), "exclusive_addr");
- cpu_exclusive_val = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_exclusive_val = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, exclusive_val), "exclusive_val");
- cpu_exclusive_high = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_exclusive_high = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, exclusive_high), "exclusive_high");
#ifdef CONFIG_USER_ONLY
- cpu_exclusive_test = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_exclusive_test = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, exclusive_test), "exclusive_test");
- cpu_exclusive_info = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_exclusive_info = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUARMState, exclusive_info), "exclusive_info");
#endif
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 617e1b4..5e3154c 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3484,41 +3484,41 @@ void cris_initialize_tcg(void)
#include "helper.h"
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cc_x = tcg_global_mem_new(TCG_AREG0,
+ cc_x = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_x), "cc_x");
- cc_src = tcg_global_mem_new(TCG_AREG0,
+ cc_src = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_src), "cc_src");
- cc_dest = tcg_global_mem_new(TCG_AREG0,
+ cc_dest = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_dest),
"cc_dest");
- cc_result = tcg_global_mem_new(TCG_AREG0,
+ cc_result = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_result),
"cc_result");
- cc_op = tcg_global_mem_new(TCG_AREG0,
+ cc_op = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_op), "cc_op");
- cc_size = tcg_global_mem_new(TCG_AREG0,
+ cc_size = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_size),
"cc_size");
- cc_mask = tcg_global_mem_new(TCG_AREG0,
+ cc_mask = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, cc_mask),
"cc_mask");
- env_pc = tcg_global_mem_new(TCG_AREG0,
+ env_pc = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, pc),
"pc");
- env_btarget = tcg_global_mem_new(TCG_AREG0,
+ env_btarget = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, btarget),
"btarget");
- env_btaken = tcg_global_mem_new(TCG_AREG0,
+ env_btaken = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, btaken),
"btaken");
for (i = 0; i < 16; i++) {
- cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, regs[i]),
regnames[i]);
}
for (i = 0; i < 16; i++) {
- cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_PR[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUCRISState, pregs[i]),
pregnames[i]);
}
diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
index d6ef084..7544099 100644
--- a/target-cris/translate_v10.c
+++ b/target-cris/translate_v10.c
@@ -1259,45 +1259,45 @@ static unsigned int crisv10_decoder(CPUCRISState *env,
DisasContext *dc)
void cris_initialize_crisv10_tcg(void)
{
- int i;
-
- cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cc_x = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_x), "cc_x");
- cc_src = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_src), "cc_src");
- cc_dest = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_dest),
- "cc_dest");
- cc_result = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_result),
- "cc_result");
- cc_op = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_op), "cc_op");
- cc_size = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_size),
- "cc_size");
- cc_mask = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, cc_mask),
- "cc_mask");
-
- env_pc = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, pc),
- "pc");
- env_btarget = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, btarget),
- "btarget");
- env_btaken = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, btaken),
- "btaken");
- for (i = 0; i < 16; i++) {
- cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, regs[i]),
- regnames_v10[i]);
- }
- for (i = 0; i < 16; i++) {
- cpu_PR[i] = tcg_global_mem_new(TCG_AREG0,
- offsetof(CPUCRISState, pregs[i]),
- pregnames_v10[i]);
- }
+ int i;
+
+ cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ cc_x = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_x), "cc_x");
+ cc_src = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_src), "cc_src");
+ cc_dest = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_dest),
+ "cc_dest");
+ cc_result = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_result),
+ "cc_result");
+ cc_op = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_op), "cc_op");
+ cc_size = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_size),
+ "cc_size");
+ cc_mask = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, cc_mask),
+ "cc_mask");
+
+ env_pc = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, pc),
+ "pc");
+ env_btarget = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, btarget),
+ "btarget");
+ env_btaken = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, btaken),
+ "btaken");
+ for (i = 0; i < 16; i++) {
+ cpu_R[i] = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, regs[i]),
+ regnames_v10[i]);
+ }
+ for (i = 0; i < 16; i++) {
+ cpu_PR[i] = tcg_global_mem_new(cpu_env,
+ offsetof(CPUCRISState, pregs[i]),
+ pregnames_v10[i]);
+ }
}
diff --git a/target-i386/translate.c b/target-i386/translate.c
index be74ebc..3a3ba50 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8201,64 +8201,64 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
void optimize_flags_init(void)
{
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State, cc_op), "cc_op");
- cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_dst),
+ cpu_cc_dst = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_dst),
"cc_dst");
- cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_src),
+ cpu_cc_src = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_src),
"cc_src");
- cpu_cc_src2 = tcg_global_mem_new(TCG_AREG0, offsetof(CPUX86State, cc_src2),
+ cpu_cc_src2 = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_src2),
"cc_src2");
#ifdef TARGET_X86_64
- cpu_regs[R_EAX] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_EAX] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_EAX]), "rax");
- cpu_regs[R_ECX] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_ECX] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_ECX]), "rcx");
- cpu_regs[R_EDX] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_EDX] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_EDX]), "rdx");
- cpu_regs[R_EBX] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_EBX] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_EBX]), "rbx");
- cpu_regs[R_ESP] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_ESP] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_ESP]), "rsp");
- cpu_regs[R_EBP] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_EBP] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_EBP]), "rbp");
- cpu_regs[R_ESI] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_ESI] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_ESI]), "rsi");
- cpu_regs[R_EDI] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[R_EDI] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State,
regs[R_EDI]), "rdi");
- cpu_regs[8] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[8] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[8]), "r8");
- cpu_regs[9] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[9] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[9]),
"r9");
- cpu_regs[10] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[10] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[10]),
"r10");
- cpu_regs[11] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[11] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[11]),
"r11");
- cpu_regs[12] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[12] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[12]),
"r12");
- cpu_regs[13] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[13] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[13]),
"r13");
- cpu_regs[14] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[14] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[14]),
"r14");
- cpu_regs[15] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_regs[15] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUX86State, regs[15]),
"r15");
#else
- cpu_regs[R_EAX] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_EAX] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_EAX]), "eax");
- cpu_regs[R_ECX] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_ECX] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_ECX]), "ecx");
- cpu_regs[R_EDX] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_EDX] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_EDX]), "edx");
- cpu_regs[R_EBX] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_EBX] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_EBX]), "ebx");
- cpu_regs[R_ESP] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_ESP] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_ESP]), "esp");
- cpu_regs[R_EBP] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_EBP] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_EBP]), "ebp");
- cpu_regs[R_ESI] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_ESI] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_ESI]), "esi");
- cpu_regs[R_EDI] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_regs[R_EDI] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUX86State,
regs[R_EDI]), "edi");
#endif
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 6ea0ecd..510faa3 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1190,48 +1190,48 @@ void lm32_translate_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
- cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, regs[i]),
regnames[i]);
}
for (i = 0; i < ARRAY_SIZE(cpu_bp); i++) {
- cpu_bp[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_bp[i] = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, bp[i]),
regnames[32+i]);
}
for (i = 0; i < ARRAY_SIZE(cpu_wp); i++) {
- cpu_wp[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_wp[i] = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, wp[i]),
regnames[36+i]);
}
- cpu_pc = tcg_global_mem_new(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, pc),
"pc");
- cpu_ie = tcg_global_mem_new(TCG_AREG0,
+ cpu_ie = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, ie),
"ie");
- cpu_icc = tcg_global_mem_new(TCG_AREG0,
+ cpu_icc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, icc),
"icc");
- cpu_dcc = tcg_global_mem_new(TCG_AREG0,
+ cpu_dcc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, dcc),
"dcc");
- cpu_cc = tcg_global_mem_new(TCG_AREG0,
+ cpu_cc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, cc),
"cc");
- cpu_cfg = tcg_global_mem_new(TCG_AREG0,
+ cpu_cfg = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, cfg),
"cfg");
- cpu_eba = tcg_global_mem_new(TCG_AREG0,
+ cpu_eba = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, eba),
"eba");
- cpu_dc = tcg_global_mem_new(TCG_AREG0,
+ cpu_dc = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, dc),
"dc");
- cpu_deba = tcg_global_mem_new(TCG_AREG0,
+ cpu_deba = tcg_global_mem_new(cpu_env,
offsetof(CPULM32State, deba),
"deba");
}
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 0be0a96..3b6485b 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -70,44 +70,48 @@ void m68k_tcg_init(void)
char *p;
int i;
-#define DEFO32(name, offset) QREG_##name = tcg_global_mem_new_i32(TCG_AREG0,
offsetof(CPUM68KState, offset), #name);
-#define DEFO64(name, offset) QREG_##name = tcg_global_mem_new_i64(TCG_AREG0,
offsetof(CPUM68KState, offset), #name);
-#define DEFF64(name, offset) DEFO64(name, offset)
+ cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+
+#define DEFO32(name, offset) \
+ QREG_##name = tcg_global_mem_new_i32(cpu_env, \
+ offsetof(CPUM68KState, offset), #name);
+#define DEFO64(name, offset) \
+ QREG_##name = tcg_global_mem_new_i64(cpu_env, \
+ offsetof(CPUM68KState, offset), #name);
+#define DEFF64(name, offset) DEFO64(name, offset)
#include "qregs.def"
#undef DEFO32
#undef DEFO64
#undef DEFF64
- cpu_halted = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_halted = tcg_global_mem_new_i32(cpu_env,
-offsetof(M68kCPU, env) +
offsetof(CPUState, halted), "HALTED");
- cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
-
p = cpu_reg_names;
for (i = 0; i < 8; i++) {
sprintf(p, "D%d", i);
- cpu_dregs[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_dregs[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUM68KState, dregs[i]), p);
p += 3;
sprintf(p, "A%d", i);
- cpu_aregs[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_aregs[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUM68KState, aregs[i]), p);
p += 3;
sprintf(p, "F%d", i);
- cpu_fregs[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_fregs[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUM68KState, fregs[i]), p);
p += 3;
}
for (i = 0; i < 4; i++) {
sprintf(p, "ACC%d", i);
- cpu_macc[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_macc[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUM68KState, macc[i]), p);
p += 5;
}
- NULL_QREG = tcg_global_mem_new(TCG_AREG0, -4, "NULL");
- store_dummy = tcg_global_mem_new(TCG_AREG0, -8, "NULL");
+ NULL_QREG = tcg_global_mem_new(cpu_env, -4, "NULL");
+ store_dummy = tcg_global_mem_new(cpu_env, -8, "NULL");
#define GEN_HELPER 2
#include "helpers.h"
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 0673176..2a76939 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1999,28 +1999,28 @@ void mb_tcg_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- env_debug = tcg_global_mem_new(TCG_AREG0,
+ env_debug = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, debug),
"debug0");
- env_iflags = tcg_global_mem_new(TCG_AREG0,
+ env_iflags = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, iflags),
"iflags");
- env_imm = tcg_global_mem_new(TCG_AREG0,
+ env_imm = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, imm),
"imm");
- env_btarget = tcg_global_mem_new(TCG_AREG0,
+ env_btarget = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, btarget),
"btarget");
- env_btaken = tcg_global_mem_new(TCG_AREG0,
+ env_btaken = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, btaken),
"btaken");
for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
- cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, regs[i]),
regnames[i]);
}
for (i = 0; i < ARRAY_SIZE(cpu_SR); i++) {
- cpu_SR[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_SR[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMBState, sregs[i]),
special_regnames[i]);
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index ad43d59..fd92936 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -15845,44 +15845,45 @@ void mips_tcg_init(void)
return;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+
TCGV_UNUSED(cpu_gpr[0]);
for (i = 1; i < 32; i++)
- cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_gpr[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState,
active_tc.gpr[i]),
regnames[i]);
for (i = 0; i < 32; i++) {
int off = offsetof(CPUMIPSState, active_fpu.fpr[i]);
- fpu_f64[i] = tcg_global_mem_new_i64(TCG_AREG0, off, fregnames[i]);
+ fpu_f64[i] = tcg_global_mem_new_i64(cpu_env, off, fregnames[i]);
}
- cpu_PC = tcg_global_mem_new(TCG_AREG0,
+ cpu_PC = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, active_tc.PC), "PC");
for (i = 0; i < MIPS_DSP_ACC; i++) {
- cpu_HI[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_HI[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, active_tc.HI[i]),
regnames_HI[i]);
- cpu_LO[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_LO[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, active_tc.LO[i]),
regnames_LO[i]);
- cpu_ACX[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_ACX[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState,
active_tc.ACX[i]),
regnames_ACX[i]);
}
- cpu_dspctrl = tcg_global_mem_new(TCG_AREG0,
+ cpu_dspctrl = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState,
active_tc.DSPControl),
"DSPControl");
- bcond = tcg_global_mem_new(TCG_AREG0,
+ bcond = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, bcond), "bcond");
- btarget = tcg_global_mem_new(TCG_AREG0,
+ btarget = tcg_global_mem_new(cpu_env,
offsetof(CPUMIPSState, btarget), "btarget");
- hflags = tcg_global_mem_new_i32(TCG_AREG0,
+ hflags = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMIPSState, hflags), "hflags");
- fpu_fcr0 = tcg_global_mem_new_i32(TCG_AREG0,
+ fpu_fcr0 = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMIPSState, active_fpu.fcr0),
"fcr0");
- fpu_fcr31 = tcg_global_mem_new_i32(TCG_AREG0,
+ fpu_fcr31 = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMIPSState,
active_fpu.fcr31),
"fcr31");
diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index a93196f..e0bb432 100644
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -110,16 +110,16 @@ void moxie_translate_init(void)
return;
}
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMoxieState, pc), "$pc");
for (i = 0; i < 16; i++)
- cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMoxieState,
gregs[i]),
gregnames[i]);
- cc_a = tcg_global_mem_new_i32(TCG_AREG0,
+ cc_a = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMoxieState, cc_a), "cc_a");
- cc_b = tcg_global_mem_new_i32(TCG_AREG0,
+ cc_b = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUMoxieState, cc_b), "cc_b");
done_init = 1;
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 723b77d..4d1d88d 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -74,39 +74,39 @@ void openrisc_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cpu_sr = tcg_global_mem_new(TCG_AREG0,
+ cpu_sr = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, sr), "sr");
- env_flags = tcg_global_mem_new_i32(TCG_AREG0,
+ env_flags = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUOpenRISCState, flags),
"flags");
- cpu_pc = tcg_global_mem_new(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, pc), "pc");
- cpu_npc = tcg_global_mem_new(TCG_AREG0,
+ cpu_npc = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, npc), "npc");
- cpu_ppc = tcg_global_mem_new(TCG_AREG0,
+ cpu_ppc = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, ppc), "ppc");
- jmp_pc = tcg_global_mem_new(TCG_AREG0,
+ jmp_pc = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, jmp_pc), "jmp_pc");
- env_btaken = tcg_global_mem_new_i32(TCG_AREG0,
+ env_btaken = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUOpenRISCState, btaken),
"btaken");
- fpcsr = tcg_global_mem_new_i32(TCG_AREG0,
+ fpcsr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUOpenRISCState, fpcsr),
"fpcsr");
- machi = tcg_global_mem_new(TCG_AREG0,
+ machi = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, machi),
"machi");
- maclo = tcg_global_mem_new(TCG_AREG0,
+ maclo = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, maclo),
"maclo");
- fpmaddhi = tcg_global_mem_new(TCG_AREG0,
+ fpmaddhi = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, fpmaddhi),
"fpmaddhi");
- fpmaddlo = tcg_global_mem_new(TCG_AREG0,
+ fpmaddlo = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, fpmaddlo),
"fpmaddlo");
for (i = 0; i < 32; i++) {
- cpu_R[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUOpenRISCState, gpr[i]),
regnames[i]);
}
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 2da7bc7..d1537c4 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -90,7 +90,7 @@ void ppc_translate_init(void)
for (i = 0; i < 8; i++) {
snprintf(p, cpu_reg_names_size, "crf%d", i);
- cpu_crf[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_crf[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUPPCState, crf[i]), p);
p += 5;
cpu_reg_names_size -= 5;
@@ -98,30 +98,30 @@ void ppc_translate_init(void)
for (i = 0; i < 32; i++) {
snprintf(p, cpu_reg_names_size, "r%d", i);
- cpu_gpr[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_gpr[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, gpr[i]), p);
p += (i < 10) ? 3 : 4;
cpu_reg_names_size -= (i < 10) ? 3 : 4;
#if !defined(TARGET_PPC64)
snprintf(p, cpu_reg_names_size, "r%dH", i);
- cpu_gprh[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_gprh[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUPPCState, gprh[i]),
p);
p += (i < 10) ? 4 : 5;
cpu_reg_names_size -= (i < 10) ? 4 : 5;
#endif
snprintf(p, cpu_reg_names_size, "fp%d", i);
- cpu_fpr[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUPPCState, fpr[i]), p);
p += (i < 10) ? 4 : 5;
cpu_reg_names_size -= (i < 10) ? 4 : 5;
snprintf(p, cpu_reg_names_size, "avr%dH", i);
#ifdef HOST_WORDS_BIGENDIAN
- cpu_avrh[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_avrh[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUPPCState,
avr[i].u64[0]), p);
#else
- cpu_avrh[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_avrh[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUPPCState,
avr[i].u64[1]), p);
#endif
p += (i < 10) ? 6 : 7;
@@ -129,50 +129,50 @@ void ppc_translate_init(void)
snprintf(p, cpu_reg_names_size, "avr%dL", i);
#ifdef HOST_WORDS_BIGENDIAN
- cpu_avrl[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_avrl[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUPPCState,
avr[i].u64[1]), p);
#else
- cpu_avrl[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_avrl[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUPPCState,
avr[i].u64[0]), p);
#endif
p += (i < 10) ? 6 : 7;
cpu_reg_names_size -= (i < 10) ? 6 : 7;
}
- cpu_nip = tcg_global_mem_new(TCG_AREG0,
+ cpu_nip = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, nip), "nip");
- cpu_msr = tcg_global_mem_new(TCG_AREG0,
+ cpu_msr = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, msr), "msr");
- cpu_ctr = tcg_global_mem_new(TCG_AREG0,
+ cpu_ctr = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, ctr), "ctr");
- cpu_lr = tcg_global_mem_new(TCG_AREG0,
+ cpu_lr = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, lr), "lr");
#if defined(TARGET_PPC64)
- cpu_cfar = tcg_global_mem_new(TCG_AREG0,
+ cpu_cfar = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, cfar), "cfar");
#endif
- cpu_xer = tcg_global_mem_new(TCG_AREG0,
+ cpu_xer = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, xer), "xer");
- cpu_so = tcg_global_mem_new(TCG_AREG0,
+ cpu_so = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, so), "SO");
- cpu_ov = tcg_global_mem_new(TCG_AREG0,
+ cpu_ov = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, ov), "OV");
- cpu_ca = tcg_global_mem_new(TCG_AREG0,
+ cpu_ca = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, ca), "CA");
- cpu_reserve = tcg_global_mem_new(TCG_AREG0,
+ cpu_reserve = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, reserve_addr),
"reserve_addr");
- cpu_fpscr = tcg_global_mem_new(TCG_AREG0,
+ cpu_fpscr = tcg_global_mem_new(cpu_env,
offsetof(CPUPPCState, fpscr), "fpscr");
- cpu_access_type = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_access_type = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUPPCState,
access_type), "access_type");
/* register helpers */
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index afe90eb..1e3d5ba 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -159,32 +159,32 @@ void s390x_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- psw_addr = tcg_global_mem_new_i64(TCG_AREG0,
+ psw_addr = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUS390XState, psw.addr),
"psw_addr");
- psw_mask = tcg_global_mem_new_i64(TCG_AREG0,
+ psw_mask = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUS390XState, psw.mask),
"psw_mask");
- cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUS390XState, cc_op),
+ cc_op = tcg_global_mem_new_i32(cpu_env, offsetof(CPUS390XState, cc_op),
"cc_op");
- cc_src = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUS390XState, cc_src),
+ cc_src = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_src),
"cc_src");
- cc_dst = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUS390XState, cc_dst),
+ cc_dst = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_dst),
"cc_dst");
- cc_vr = tcg_global_mem_new_i64(TCG_AREG0, offsetof(CPUS390XState, cc_vr),
+ cc_vr = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, cc_vr),
"cc_vr");
for (i = 0; i < 16; i++) {
snprintf(cpu_reg_names[i], sizeof(cpu_reg_names[0]), "r%d", i);
- regs[i] = tcg_global_mem_new(TCG_AREG0,
+ regs[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUS390XState, regs[i]),
cpu_reg_names[i]);
}
for (i = 0; i < 16; i++) {
snprintf(cpu_reg_names[i + 16], sizeof(cpu_reg_names[0]), "f%d", i);
- fregs[i] = tcg_global_mem_new(TCG_AREG0,
+ fregs[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUS390XState, fregs[i].d),
cpu_reg_names[i + 16]);
}
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index c06b29f..e6a9c7f 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -99,47 +99,47 @@ void sh4_translate_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < 24; i++)
- cpu_gregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, gregs[i]),
gregnames[i]);
- cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, pc), "PC");
- cpu_sr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_sr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, sr), "SR");
- cpu_ssr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_ssr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, ssr), "SSR");
- cpu_spc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_spc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, spc), "SPC");
- cpu_gbr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_gbr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, gbr), "GBR");
- cpu_vbr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_vbr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, vbr), "VBR");
- cpu_sgr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_sgr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, sgr), "SGR");
- cpu_dbr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_dbr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, dbr), "DBR");
- cpu_mach = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_mach = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, mach), "MACH");
- cpu_macl = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_macl = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, macl), "MACL");
- cpu_pr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, pr), "PR");
- cpu_fpscr = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_fpscr = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, fpscr), "FPSCR");
- cpu_fpul = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_fpul = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, fpul), "FPUL");
- cpu_flags = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_flags = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, flags), "_flags_");
- cpu_delayed_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_delayed_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, delayed_pc),
"_delayed_pc_");
- cpu_ldst = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_ldst = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, ldst), "_ldst_");
for (i = 0; i < 32; i++)
- cpu_fregs[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_fregs[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSH4State, fregs[i]),
fregnames[i]);
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 36615f1..6a921f3 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5384,75 +5384,79 @@ void gen_intermediate_code_init(CPUSPARCState *env)
inited = 1;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cpu_regwptr = tcg_global_mem_new_ptr(TCG_AREG0,
+ cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
offsetof(CPUSPARCState, regwptr),
"regwptr");
#ifdef TARGET_SPARC64
- cpu_xcc = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState,
xcc),
+ cpu_xcc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, xcc),
"xcc");
- cpu_asi = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState,
asi),
+ cpu_asi = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, asi),
"asi");
- cpu_fprs = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState,
fprs),
+ cpu_fprs = tcg_global_mem_new_i32(cpu_env,
+ offsetof(CPUSPARCState, fprs),
"fprs");
- cpu_gsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, gsr),
+ cpu_gsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, gsr),
"gsr");
- cpu_tick_cmpr = tcg_global_mem_new(TCG_AREG0,
+ cpu_tick_cmpr = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState, tick_cmpr),
"tick_cmpr");
- cpu_stick_cmpr = tcg_global_mem_new(TCG_AREG0,
+ cpu_stick_cmpr = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState,
stick_cmpr),
"stick_cmpr");
- cpu_hstick_cmpr = tcg_global_mem_new(TCG_AREG0,
+ cpu_hstick_cmpr = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState,
hstick_cmpr),
"hstick_cmpr");
- cpu_hintp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState,
hintp),
+ cpu_hintp = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hintp),
"hintp");
- cpu_htba = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, htba),
+ cpu_htba = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, htba),
"htba");
- cpu_hver = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hver),
+ cpu_hver = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, hver),
"hver");
- cpu_ssr = tcg_global_mem_new(TCG_AREG0,
+ cpu_ssr = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState, ssr), "ssr");
- cpu_ver = tcg_global_mem_new(TCG_AREG0,
+ cpu_ver = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState, version), "ver");
- cpu_softint = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_softint = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUSPARCState, softint),
"softint");
#else
- cpu_wim = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, wim),
+ cpu_wim = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, wim),
"wim");
#endif
- cpu_cond = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cond),
+ cpu_cond = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, cond),
"cond");
- cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState,
cc_src),
+ cpu_cc_src = tcg_global_mem_new(cpu_env,
+ offsetof(CPUSPARCState, cc_src),
"cc_src");
- cpu_cc_src2 = tcg_global_mem_new(TCG_AREG0,
+ cpu_cc_src2 = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState, cc_src2),
"cc_src2");
- cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState,
cc_dst),
+ cpu_cc_dst = tcg_global_mem_new(cpu_env,
+ offsetof(CPUSPARCState, cc_dst),
"cc_dst");
- cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState,
cc_op),
+ cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
+ offsetof(CPUSPARCState, cc_op),
"cc_op");
- cpu_psr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState,
psr),
+ cpu_psr = tcg_global_mem_new_i32(cpu_env, offsetof(CPUSPARCState, psr),
"psr");
- cpu_fsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, fsr),
+ cpu_fsr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, fsr),
"fsr");
- cpu_pc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, pc),
+ cpu_pc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, pc),
"pc");
- cpu_npc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, npc),
+ cpu_npc = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, npc),
"npc");
- cpu_y = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, y), "y");
+ cpu_y = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, y), "y");
#ifndef CONFIG_USER_ONLY
- cpu_tbr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, tbr),
+ cpu_tbr = tcg_global_mem_new(cpu_env, offsetof(CPUSPARCState, tbr),
"tbr");
#endif
for (i = 1; i < 8; i++) {
- cpu_gregs[i] = tcg_global_mem_new(TCG_AREG0,
+ cpu_gregs[i] = tcg_global_mem_new(cpu_env,
offsetof(CPUSPARCState,
gregs[i]),
gregnames[i]);
}
for (i = 0; i < TARGET_DPREGS; i++) {
- cpu_fpr[i] = tcg_global_mem_new_i64(TCG_AREG0,
+ cpu_fpr[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUSPARCState,
fpr[i]),
fregnames[i]);
}
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index 1246895..67c3964 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -71,7 +71,7 @@ void uc32_translate_init(void)
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
for (i = 0; i < 32; i++) {
- cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUUniCore32State, regs[i]),
regnames[i]);
}
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 24343bd..bb7dfd0 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -208,24 +208,24 @@ void xtensa_translate_init(void)
int i;
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
- cpu_pc = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_pc = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, pc), "pc");
for (i = 0; i < 16; i++) {
- cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_R[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, regs[i]),
regnames[i]);
}
for (i = 0; i < 16; i++) {
- cpu_FR[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_FR[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, fregs[i]),
fregnames[i]);
}
for (i = 0; i < 256; ++i) {
if (sregnames[i].name) {
- cpu_SR[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_SR[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, sregs[i]),
sregnames[i].name);
}
@@ -233,7 +233,7 @@ void xtensa_translate_init(void)
for (i = 0; i < 256; ++i) {
if (uregnames[i].name) {
- cpu_UR[i] = tcg_global_mem_new_i32(TCG_AREG0,
+ cpu_UR[i] = tcg_global_mem_new_i32(cpu_env,
offsetof(CPUXtensaState, uregs[i]),
uregnames[i].name);
}
diff --git a/tcg/tcg.c b/tcg/tcg.c
index fd7fb6b..c72a144 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -389,13 +389,12 @@ TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
return MAKE_TCGV_I64(idx);
}
-static inline int tcg_global_mem_new_internal(TCGType type, int reg,
- intptr_t offset,
- const char *name)
+int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base,
+ intptr_t offset, const char *name)
{
TCGContext *s = &tcg_ctx;
- TCGTemp *ts;
- int idx;
+ TCGTemp *ts, *base_ts = &s->temps[GET_TCGV_PTR(base)];
+ int idx, reg = base_ts->reg;
idx = s->nb_globals;
#if TCG_TARGET_REG_BITS == 32
@@ -450,18 +449,6 @@ static inline int tcg_global_mem_new_internal(TCGType
type, int reg,
return idx;
}
-TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name)
-{
- int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
- return MAKE_TCGV_I32(idx);
-}
-
-TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name)
-{
- int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
- return MAKE_TCGV_I64(idx);
-}
-
static inline int tcg_temp_new_internal(TCGType type, int temp_local)
{
TCGContext *s = &tcg_ctx;
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 902c751..dade849 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -536,33 +536,55 @@ int tcg_gen_code_search_pc(TCGContext *s, uint8_t
*gen_code_buf, long offset);
void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
+int tcg_global_mem_new_internal(TCGType, TCGv_ptr, intptr_t, const char *);
+
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
-TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
+TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
+
TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
+TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
+
+void tcg_temp_free_i32(TCGv_i32 arg);
+void tcg_temp_free_i64(TCGv_i64 arg);
+
+char *tcg_get_arg_str_i32(TCGContext *s, char *buf,
+ int buf_size, TCGv_i32 arg);
+char *tcg_get_arg_str_i64(TCGContext *s, char *buf,
+ int buf_size, TCGv_i64 arg);
+
+static inline TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t offset,
+ const char *name)
+{
+ int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
+ return MAKE_TCGV_I32(idx);
+}
+
static inline TCGv_i32 tcg_temp_new_i32(void)
{
return tcg_temp_new_internal_i32(0);
}
+
static inline TCGv_i32 tcg_temp_local_new_i32(void)
{
return tcg_temp_new_internal_i32(1);
}
-void tcg_temp_free_i32(TCGv_i32 arg);
-char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32
arg);
-TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
-TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
-TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
+static inline TCGv_i64 tcg_global_mem_new_i64(TCGv_ptr reg, intptr_t offset,
+ const char *name)
+{
+ int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
+ return MAKE_TCGV_I64(idx);
+}
+
static inline TCGv_i64 tcg_temp_new_i64(void)
{
return tcg_temp_new_internal_i64(0);
}
+
static inline TCGv_i64 tcg_temp_local_new_i64(void)
{
return tcg_temp_new_internal_i64(1);
}
-void tcg_temp_free_i64(TCGv_i64 arg);
-char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64
arg);
#if defined(CONFIG_DEBUG_TCG)
/* If you call tcg_clear_temp_count() at the start of a section of
--
1.8.1.4
- [Qemu-devel] [RFC 00/16] TCG indirect registers, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 02/16] tcg: Introduce TCGTempType, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 01/16] tcg: Change tcg_global_mem_new_* to take a TCGv_ptr,
Richard Henderson <=
- [Qemu-devel] [RFC 03/16] tcg: Change ts->mem_reg to ts->mem_base, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 04/16] tcg: Compress TCGLabelQemuLdst, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 05/16] tcg: More use of TCGReg where appropriate, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 06/16] tcg: Remove tcg_get_arg_str_i32/64, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 07/16] tcg: Change reg_to_temp to TCGTemp pointer, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 08/16] tcg: Change temp_dead argument to TCGTemp, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 09/16] tcg: Change temp_sync argument to TCGTemp, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 10/16] tcg: Change temp_save argument to TCGTemp, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 11/16] tcg: Introduce temp_load, Richard Henderson, 2013/09/19
- [Qemu-devel] [RFC 12/16] tcg: Tidy temporary allocation, Richard Henderson, 2013/09/19