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Re: [Qemu-devel] [PATCH 1/2] ich9: update sci on gpe write
From: |
Hu Tao |
Subject: |
Re: [Qemu-devel] [PATCH 1/2] ich9: update sci on gpe write |
Date: |
Mon, 23 Sep 2013 19:20:41 +0800 |
User-agent: |
Mutt/1.5.21 (2010-09-15) |
On Thu, Sep 12, 2013 at 05:22:14PM +0200, Igor Mammedov wrote:
> On Wed, 21 Aug 2013 17:04:27 +0800
> Hu Tao <address@hidden> wrote:
>
> > OSPM may disable the sci by clearing GPEx_BLK EN bit, in the case
> > we have to set sci level to 0 or guest will receive sci interrupts
> > endlessly.
>
> Could you make a more verbose comment, referring to relevant ACPI spec chapter
> and it would be nice,
See Section 5.6.4, ACPI 5.0, page 221.
> if you experienced problem with linux guest, to add
> symptoms here as well.
See http://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02711.html.
I guess without this patch the same thing will happen in guest linux
when hotplugging a vcpu.
>
> commit 633aa0ac did equivalent change to piix4 part, so it's worth to mention
> it here.
>
> > Signed-off-by: Hu Tao <address@hidden>
> > ---
> > hw/acpi/ich9.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
> > index 3fb443d..8717c15 100644
> > --- a/hw/acpi/ich9.c
> > +++ b/hw/acpi/ich9.c
> > @@ -79,6 +79,8 @@ static void ich9_gpe_writeb(void *opaque, hwaddr addr,
> > uint64_t val,
> > {
> > ICH9LPCPMRegs *pm = opaque;
> > acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
> > +
> > + pm_update_sci(pm);
> > }
> >
> > static const MemoryRegionOps ich9_gpe_ops = {