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Re: [Qemu-devel] [PATCH] target-ppc: Little Endian Correction to Load/St
From: |
Alexander Graf |
Subject: |
Re: [Qemu-devel] [PATCH] target-ppc: Little Endian Correction to Load/Store Vector Element |
Date: |
Wed, 25 Sep 2013 14:38:47 +0200 |
On 25.09.2013, at 09:42, Anton Blanchard wrote:
> From: Tom Musta <address@hidden>
>
> The Load Vector Element (lve*x) and Store Vector Element (stve*x)
> instructions not only byte-swap in Little Endian mode, they also
> invert the element that is accessed. For example, the RTL for
> lvehx contains this:
>
> eb <-- EA[60:63]
> if Big-Endian byte ordering then
> VRT[8*eb:8*eb+15] <-- MEM(EA,2)
> else
> VRT[112-(8*eb):127-(8*eb)] <-- MEM(EA,2)
>
> This patch adds the element inversion, as described in the last line
> of the RTL.
>
> Signed-off-by: Tom Musta <address@hidden>
> Reviewed-by: Anton Blanchard <address@hidden>
Thanks, applied to ppc-next.
For the future, you probably want to make this a SoB instead of a Reviewed-by
line :).
Alex