[Qemu-devel] [PATCH 48/60] AArch64: Add 0x1a encoding of add instructions

[Alexander Graf]

The "Add/subtract (with carry)" instructions can also be handled by our
generic add instruction decoder, so get them handled by that one too.

Signed-off-by: Alexander Graf <address@hidden>
---
 target-arm/translate-a64.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index db55389..32cfab3 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -2201,6 +2201,8 @@ void disas_a64_insn(CPUARMState *env, DisasContext *s)
             handle_rev(s, insn);
         } else if ((insn & 0x7ffff800) == 0x5ac01000) {
             handle_clz(s, insn);
+        } else if (!get_bits(insn, 21, 3) && !get_bits(insn, 10, 6)) {
+            handle_add(s, insn);
         } else {
             unallocated_encoding(s);
         }
-- 
1.7.12.4