Re: [Qemu-devel] mail to Paul Brook address@hidden bouncing address@hidden: Delivery Status Notification (Failure)]

[Andreas Färber]

Am 30.09.2013 12:55, schrieb Michael S. Tsirkin:
> Anyone knows what's going on?

I've already ping'ed him on IRC without success and wrote to another
email address that I found on GitHub, where there was some recent activity.

> If no mail should be sent to address@hidden,
> let's add .mailcap so get_maintainer doesn't suggest this
> address.

I would rather suggest that if someone has not been actively maintaining
things for a while and is ignoring requests for what is going on, we
should remove that person from MAINTAINERS. Most ARM files won't have
recent SoBs from him fixing the larger part of CCs, then .mailcap would
be mainly relevant for ColdFire.

Regards,
Andreas

> 
> ----- Forwarded message from address@hidden -----
> 
> Date: Mon, 30 Sep 2013 03:08:22 -0700
> From: address@hidden
> To: address@hidden
> Subject: Delivery Status Notification (Failure)
> Message-ID: <address@hidden>
> 
> This is an automatically generated Delivery Status Notification.
> 
> Delivery to the following recipients failed.
> 
>        address@hidden
> 
> 
> 
> 
> Reporting-MTA: dns;svr-orw-fem-01.mgc.mentorg.com
> Received-From-MTA: dns;relay1.mentorg.com
> Arrival-Date: Mon, 30 Sep 2013 03:08:21 -0700
> 
> Final-Recipient: rfc822;address@hidden
> Action: failed
> Status: 5.7.1
> X-Display-Name: Brook, Paul
> 
> 
> Date: Mon, 30 Sep 2013 13:10:35 +0300
> From: "Michael S. Tsirkin" <address@hidden>
> To: Marcel Apfelbaum <address@hidden>
> Cc: Paolo Bonzini <address@hidden>, "address@hidden"
>  <address@hidden>, address@hidden, address@hidden,
>  address@hidden, address@hidden, address@hidden,
>  address@hidden, address@hidden, address@hidden,
>  address@hidden, address@hidden
> Subject: Re: [Qemu-devel] [PATCH 0/3] hw: set irq without selecting INTx pin
> Message-ID: <address@hidden>
> In-Reply-To: <address@hidden>
> 
> On Mon, Sep 30, 2013 at 12:43:20PM +0300, Marcel Apfelbaum wrote:
>> On Mon, 2013-09-30 at 12:14 +0300, Michael S. Tsirkin wrote:
>>> On Mon, Sep 30, 2013 at 11:02:06AM +0200, Paolo Bonzini wrote:
>>>> Il 30/09/2013 10:58, Michael S. Tsirkin ha scritto:
>>>>>>>>> As a next step, can we make pci_set_irq non-inline and make
>>>>>>>>> it call pci_irq_handler directly, and get rid of the irq field?
>>>>>>> What irq field? 
>>>>>     /* IRQ objects for the INTA-INTD pins.  */
>>>>>     qemu_irq *irq;
>>>>>
>>>>
>>>> That's still used by devices that use common code for PCI and sysbus
>>>> versions (e.g. USB OHCI and EHCI).
>>>>
>>>> Paolo
>>>
>>> Well this work wouldn't be complete without
>>> addressing them anyway.
>>>
>>> These devices would have to create their own
>>> irq in pci-specific code, along the lines of:
>>
>> This irq field is used also in places where pci_set_irq(PCIDevice dev, level)
>> can't infer the INTx:
>> - PCIExpress: 
>> qemu_set_irq(dev->irq[dev->exp.hpev_intx],dev->exp.hpev_notified);
> 
> Well the spec says, explicitly:
> 6.7.3.4.
>  Software Notification of Hot-Plug Events
> ...
> Note that all other interrupt sources within the same Function will
> assert the same virtual INTx wire
> when requesting service.
> 
> I read this to mean that this is a bug,
> and it should simply use pci_set_irq like all other
> devices.
> 
>> - vmxnet3 device: qemu_set_irq(d->irq[int_idx], 1);
>>
>> What approach should be used here?
>>
>> Thanks,
>> Marcel
>>> - s->irq = dev->irq[3];
>>> + s->irq = qemu_allocate_irqs(pci_set_irq, dev, 1);
>>>
>>>
>>> If there's more than one device like this, we should add
>>>
>>> /* Return an irq that calls pci_set_irq internally */
>>> qemu_irq *pci_allocate_irq(PCIDevice *);
>>>
>>
>>
> 
> 
> 
> ----- End forwarded message -----
> 


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