[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 02/13] target-openrisc: Separate Delayed slot handli
From: |
Sebastian Macke |
Subject: |
[Qemu-devel] [PATCH 02/13] target-openrisc: Separate Delayed slot handling from main loop |
Date: |
Tue, 29 Oct 2013 20:04:44 +0100 |
To increase the readability the delayed slot handling is separated to
a function
Signed-off-by: Sebastian Macke <address@hidden>
---
target-openrisc/translate.c | 46 +++++++++++++++++++++++++++++----------------
1 file changed, 30 insertions(+), 16 deletions(-)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 1047661..31f8717 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1655,6 +1655,35 @@ static void check_breakpoint(OpenRISCCPU *cpu,
DisasContext *dc)
}
}
+static void handle_delay_slot(DisasContext *dc)
+{
+ dc->tb_flags &= ~D_FLAG;
+ gen_sync_flags(dc);
+
+ switch (dc->j_state) {
+ case JUMP_BRANCH:
+ {
+ int l1 = gen_new_label();
+ tcg_gen_brcondi_tl(TCG_COND_NE, dc->btaken, 0, l1);
+ gen_goto_tb(dc, 1, dc->pc);
+ gen_set_label(l1);
+ tcg_temp_free(dc->btaken);
+ gen_goto_tb(dc, 0, dc->j_target);
+ break;
+ }
+ case JUMP_STATIC:
+ gen_goto_tb(dc, 0, dc->j_target);
+ break;
+ case JUMP_DYNAMIC:
+ default:
+ tcg_gen_mov_tl(cpu_pc, jmp_pc);
+ tcg_gen_exit_tb(0);
+ break;
+ }
+ dc->is_jmp = DISAS_JUMP;
+}
+
+
static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
TranslationBlock *tb,
int search_pc)
@@ -1726,22 +1755,7 @@ static inline void
gen_intermediate_code_internal(OpenRISCCPU *cpu,
if (dc->delayed_branch) {
dc->delayed_branch--;
if (!dc->delayed_branch) {
- dc->tb_flags &= ~D_FLAG;
- gen_sync_flags(dc);
- if (dc->j_state == JUMP_BRANCH) {
- int l1 = gen_new_label();
- tcg_gen_brcondi_tl(TCG_COND_NE, dc->btaken, 0, l1);
- gen_goto_tb(dc, 1, dc->pc);
- gen_set_label(l1);
- gen_goto_tb(dc, 0, dc->j_target);
- tcg_temp_free(dc->btaken);
- } else if (dc->j_state == JUMP_STATIC) {
- gen_goto_tb(dc, 0, dc->j_target);
- } else {
- tcg_gen_mov_tl(cpu_pc, jmp_pc);
- tcg_gen_exit_tb(0);
- }
- dc->is_jmp = DISAS_JUMP;
+ handle_delay_slot(dc);
break;
}
}
--
1.8.4.1
- Re: [Qemu-devel] [PATCH 06/13] target-openrisc: Remove TLB flush from l.rfe instruction, (continued)
[Qemu-devel] [PATCH 03/13] target-openrisc: Separate of load/store instructions, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 04/13] target-openrisc: sync flags only when necessary, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 02/13] target-openrisc: Separate Delayed slot handling from main loop,
Sebastian Macke <=
[Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional check, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on exception, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 08/13] target-openrisc: Test for Overflow exception statically, Sebastian Macke, 2013/10/29
[Qemu-devel] [PATCH 09/13] target-openrisc: Add CPU which neglects Carry and Overflow Flag, Sebastian Macke, 2013/10/29