[Qemu-devel] [PATCH 12/13] target-openrisc: Add correct gdb information for the pc value

[Sebastian Macke]

The former patch which removed npc and ppc also removed the part in
which the registers were send to gdb. But the npc parameter
is necessary and the numbering of registers is fixed within gdb.
The correct npc value is the current pc value.

Signed-off-by: Sebastian Macke <address@hidden>
---
 target-openrisc/gdbstub.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c
index c1f9561..81f0f43 100644
--- a/target-openrisc/gdbstub.c
+++ b/target-openrisc/gdbstub.c
@@ -31,7 +31,13 @@ int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t 
*mem_buf, int n)
     } else {
         switch (n) {
 
-        case 32:    /* SR */
+        case 32:    /* PPC */
+            return gdb_get_reg32(mem_buf, env->pc-4);
+
+        case 33:    /* NPC */
+            return gdb_get_reg32(mem_buf, env->pc);
+
+        case 34:    /* SR */
             return gdb_get_reg32(mem_buf, ENV_GET_SR(env));
 
         default:
@@ -59,10 +65,14 @@ int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t 
*mem_buf, int n)
     } else {
         switch (n) {
 
-        case 32: /* SR */
+        case 33: /* NPC */
+            env->pc = tmp;
+
+        case 34: /* SR */
             ENV_SET_SR(env, tmp);
             break;
 
+        case 32: /* PPC is not allowed to write */
         default:
             break;
         }
-- 
1.8.4.1