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[Qemu-devel] [PATCH V3 02/19] Add float32_to_uint64()
From: |
Tom Musta |
Subject: |
[Qemu-devel] [PATCH V3 02/19] Add float32_to_uint64() |
Date: |
Fri, 1 Nov 2013 08:35:38 -0500 |
This patch adds the float32_to_uint64() routine, which converts a
32-bit floating point number to an unsigned 64 bit number.
This contribution can be licensed under either the softfloat-2a or -2b
license.
V2: Reduced patch to just this single routine per feedback from Peter
Maydell.
Signed-off-by: Tom Musta <address@hidden>
---
fpu/softfloat.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
include/fpu/softfloat.h | 1 +
2 files changed, 46 insertions(+), 0 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 3070eaa..cb03dca 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1550,6 +1550,51 @@ int64 float32_to_int64( float32 a STATUS_PARAM )
/*----------------------------------------------------------------------------
| Returns the result of converting the single-precision floating-point value
+| `a' to the 64-bit unsigned integer format. The conversion is
+| performed according to the IEC/IEEE Standard for Binary Floating-Point
+| Arithmetic---which means in particular that the conversion is rounded
+| according to the current rounding mode. If `a' is a NaN, the largest
+| unsigned integer is returned. Otherwise, if the conversion overflows, the
+| largest unsigned integer is returned. If the 'a' is negative, zero is
+| returned.
+*----------------------------------------------------------------------------*/
+
+uint64 float32_to_uint64(float32 a STATUS_PARAM)
+{
+ flag aSign;
+ int_fast16_t aExp, shiftCount;
+ uint32_t aSig;
+ uint64_t aSig64, aSigExtra;
+ a = float32_squash_input_denormal(a STATUS_VAR);
+
+ aSig = extractFloat32Frac(a);
+ aExp = extractFloat32Exp(a);
+ aSign = extractFloat32Sign(a);
+ if (aSign) {
+ if (aExp) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ } else if (aSig) { /* negative denormalized */
+ float_raise(float_flag_inexact STATUS_VAR);
+ }
+ return 0;
+ }
+ shiftCount = 0xBE - aExp;
+ if (aExp) {
+ aSig |= 0x00800000;
+ }
+ if (shiftCount < 0) {
+ float_raise(float_flag_invalid STATUS_VAR);
+ return (int64_t)LIT64(0xFFFFFFFFFFFFFFFF);
+ }
+
+ aSig64 = aSig;
+ aSig64 <<= 40;
+ shift64ExtraRightJamming(aSig64, 0, shiftCount, &aSig64, &aSigExtra);
+ return roundAndPackUint64(aSig64, aSigExtra STATUS_VAR);
+}
+
+/*----------------------------------------------------------------------------
+| Returns the result of converting the single-precision floating-point value
| `a' to the 64-bit two's complement integer format. The conversion is
| performed according to the IEC/IEEE Standard for Binary Floating-Point
| Arithmetic, except that the conversion is always rounded toward zero. If
diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
index f3927e2..6448082 100644
--- a/include/fpu/softfloat.h
+++ b/include/fpu/softfloat.h
@@ -272,6 +272,7 @@ int32 float32_to_int32_round_to_zero( float32 STATUS_PARAM
);
uint32 float32_to_uint32( float32 STATUS_PARAM );
uint32 float32_to_uint32_round_to_zero( float32 STATUS_PARAM );
int64 float32_to_int64( float32 STATUS_PARAM );
+uint64 float32_to_uint64(float32 STATUS_PARAM);
int64 float32_to_int64_round_to_zero( float32 STATUS_PARAM );
float64 float32_to_float64( float32 STATUS_PARAM );
floatx80 float32_to_floatx80( float32 STATUS_PARAM );
--
1.7.1
- [Qemu-devel] [PATCH V3 00/19] PowerPC VSX Stage 3, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 01/19] Fix float64_to_uint64, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 02/19] Add float32_to_uint64(),
Tom Musta <=
- [Qemu-devel] [PATCH V3 03/19] Add set_fprf Argument to fload_invalid_op_excp(), Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 04/19] General Support for VSX Helpers, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 06/19] Add VSX ISA2.06 xmul Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 05/19] Add VSX ISA2.06 xadd/xsub Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 07/19] Add VSX ISA2.06 xdiv Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 09/19] Add VSX ISA2.06 xsqrt Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 10/19] Add VSX ISA2.06 xrsqrte Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 08/19] Add VSX ISA2.06 xre Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 11/19] Add VSX ISA2.06 xtdiv Instructions, Tom Musta, 2013/11/01
- [Qemu-devel] [PATCH V3 12/19] Add VSX ISA2.06 xtsqrt Instructions, Tom Musta, 2013/11/01