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Re: [Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn deco
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [RFC v2] target-arm: provide skeleton for a64 insn decoding |
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Date: |
Wed, 13 Nov 2013 04:29:41 +1000 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 |
On 11/12/2013 11:29 PM, Claudio Fontana wrote:
> provide a skeleton for a64 instruction decoding in translate-a64.c,
> by dividing instructions into the classes defined by the
> ARM Architecture Reference Manual(DDI0487A_a) C3
>
> Signed-off-by: Claudio Fontana <address@hidden>
> Signed-off-by: Alex Bennée <address@hidden>
> Reviewed-by: Alex Bennée <address@hidden>
> ---
> target-arm/translate-a64.c | 368
> ++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 360 insertions(+), 8 deletions(-)
>
> For the rationale, see v1 of the RFC at
> http://lists.gnu.org/archive/html/qemu-devel/2013-11/msg01312.html
Reviewed-by: Richard Henderson <address@hidden>
r~