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[Qemu-devel] [PATCH v2 7/7] exec: reduce L2_PAGE_SIZE
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PATCH v2 7/7] exec: reduce L2_PAGE_SIZE |
Date: |
Wed, 13 Nov 2013 21:24:04 +0200 |
With the single exception of ppc with 16M pages,
we get the same number of levels
with L2_PAGE_SIZE = 10 as with L2_PAGE_SIZE = 9.
by doing this we reduce memory footprint of a single level
in the node memory map by 2x without runtime overhead.
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
exec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index 6e64d27..7d3f743 100644
--- a/exec.c
+++ b/exec.c
@@ -96,7 +96,7 @@ struct PhysPageEntry {
/* Size of the L2 (and L3, etc) page tables. */
#define ADDR_SPACE_BITS 64
-#define P_L2_BITS 10
+#define P_L2_BITS 9
#define P_L2_SIZE (1 << P_L2_BITS)
#define P_L2_LEVELS (((ADDR_SPACE_BITS - TARGET_PAGE_BITS - 1) / P_L2_BITS) +
1)
--
MST
- [Qemu-devel] [PATCH v2 0/7] making address spaces 64 bit wide, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 1/7] split definitions for exec.c and translate-all.c radix trees, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 2/7] exec: replace leaf with skip, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 3/7] exec: extend skip field to 6 bit, page entry to 32 bit, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 4/7] exec: pass hw address to phys_page_find, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 5/7] exec: memory radix tree page level compression, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 6/7] exec: make address spaces 64-bit wide, Michael S. Tsirkin, 2013/11/13
- [Qemu-devel] [PATCH v2 7/7] exec: reduce L2_PAGE_SIZE,
Michael S. Tsirkin <=