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[Qemu-devel] [PATCH v2 28/60] target-i386: Remove gen_op_andl_T0_ffff
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v2 28/60] target-i386: Remove gen_op_andl_T0_ffff |
Date: |
Fri, 29 Nov 2013 16:00:15 +1300 |
Replace it with tcg_gen_ext16u_tl. In four places we can combine that
with a previous move into cpu_T[0], and in one place we can infer that
the zero-extension has already happened via the previous load.
Signed-off-by: Richard Henderson <address@hidden>
---
target-i386/translate.c | 43 ++++++++++++++++++-------------------------
1 file changed, 18 insertions(+), 25 deletions(-)
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 58bea41..236d0a7 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -252,11 +252,6 @@ static void gen_update_cc_op(DisasContext *s)
}
}
-static inline void gen_op_andl_T0_ffff(void)
-{
- tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0xffff);
-}
-
static inline void gen_op_andl_T0_im(uint32_t val)
{
tcg_gen_andi_tl(cpu_T[0], cpu_T[0], val);
@@ -5006,8 +5001,9 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
break;
case 2: /* call Ev */
/* XXX: optimize if memory (no 'and' is necessary) */
- if (s->dflag == 0)
- gen_op_andl_T0_ffff();
+ if (s->dflag == 0) {
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_T[0]);
+ }
next_eip = s->pc - s->cs_base;
tcg_gen_movi_tl(cpu_T[1], next_eip);
gen_push_T1(s);
@@ -5035,8 +5031,9 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
gen_eob(s);
break;
case 4: /* jmp Ev */
- if (s->dflag == 0)
- gen_op_andl_T0_ffff();
+ if (s->dflag == 0) {
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_T[0]);
+ }
gen_op_jmp_T0();
gen_eob(s);
break;
@@ -6421,8 +6418,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
ot = MO_8;
else
ot = dflag ? MO_32 : MO_16;
- gen_op_mov_TN_reg(MO_16, 0, R_EDX);
- gen_op_andl_T0_ffff();
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_regs[R_EDX]);
gen_check_io(s, ot, pc_start - s->cs_base,
SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | 4);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
@@ -6440,8 +6436,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
ot = MO_8;
else
ot = dflag ? MO_32 : MO_16;
- gen_op_mov_TN_reg(MO_16, 0, R_EDX);
- gen_op_andl_T0_ffff();
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_regs[R_EDX]);
gen_check_io(s, ot, pc_start - s->cs_base,
svm_is_rep(prefixes) | 4);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
@@ -6503,8 +6498,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
ot = MO_8;
else
ot = dflag ? MO_32 : MO_16;
- gen_op_mov_TN_reg(MO_16, 0, R_EDX);
- gen_op_andl_T0_ffff();
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_regs[R_EDX]);
gen_check_io(s, ot, pc_start - s->cs_base,
SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
if (use_icount)
@@ -6523,8 +6517,7 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
ot = MO_8;
else
ot = dflag ? MO_32 : MO_16;
- gen_op_mov_TN_reg(MO_16, 0, R_EDX);
- gen_op_andl_T0_ffff();
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_regs[R_EDX]);
gen_check_io(s, ot, pc_start - s->cs_base,
svm_is_rep(prefixes));
gen_op_mov_TN_reg(ot, 1, R_EAX);
@@ -6549,16 +6542,18 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
if (CODE64(s) && s->dflag)
s->dflag = 2;
gen_stack_update(s, val + (2 << s->dflag));
- if (s->dflag == 0)
- gen_op_andl_T0_ffff();
+ if (s->dflag == 0) {
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_T[0]);
+ }
gen_op_jmp_T0();
gen_eob(s);
break;
case 0xc3: /* ret */
gen_pop_T0(s);
gen_pop_update(s);
- if (s->dflag == 0)
- gen_op_andl_T0_ffff();
+ if (s->dflag == 0) {
+ tcg_gen_ext16u_tl(cpu_T[0], cpu_T[0]);
+ }
gen_op_jmp_T0();
gen_eob(s);
break;
@@ -6574,15 +6569,13 @@ static target_ulong disas_insn(CPUX86State *env,
DisasContext *s,
} else {
gen_stack_A0(s);
/* pop offset */
- gen_op_ld_v(s, 1 + s->dflag, cpu_T[0], cpu_A0);
- if (s->dflag == 0)
- gen_op_andl_T0_ffff();
+ gen_op_ld_v(s, MO_16 + s->dflag, cpu_T[0], cpu_A0);
/* NOTE: keeping EIP updated is not a problem in case of
exception */
gen_op_jmp_T0();
/* pop selector */
gen_op_addl_A0_im(2 << s->dflag);
- gen_op_ld_v(s, 1 + s->dflag, cpu_T[0], cpu_A0);
+ gen_op_ld_v(s, MO_16 + s->dflag, cpu_T[0], cpu_A0);
gen_op_movl_seg_T0_vm(R_CS);
/* add stack offset */
gen_stack_update(s, val + (4 << s->dflag));
--
1.8.3.1
- [Qemu-devel] [PATCH v2 18/60] target-i386: Use MO_BE for movbe, (continued)
- [Qemu-devel] [PATCH v2 18/60] target-i386: Use MO_BE for movbe, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 19/60] target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 20/60] target-i386: Tidy load + truncate, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 21/60] target-i386: Tidy extend + store, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 22/60] target-i386: Tidy extend + move, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 23/60] target-i386: Remove gen_op_movl_T0_0, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 24/60] target-i386: Remove gen_op_movl_T0_im*, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 25/60] target-i386: Remove gen_op_movl_T0_im*, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 26/60] target-i386: Remove gen_op_mov*_A0_im, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 27/60] target-i386: Remove gen_movtl_T*_im, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 28/60] target-i386: Remove gen_op_andl_T0_ffff,
Richard Henderson <=
- [Qemu-devel] [PATCH v2 29/60] target-i386: Remove gen_op_andl_T0_im, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 30/60] target-i386: Remove gen_op_movl_T0_T1, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 31/60] target-i386: Remove gen_op_andl_A0_ffff, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 32/60] target-i386: Use TCGMemOp for 'ot' variables, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 35/60] target-i386: Change aflag to TCGMemOp, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 36/60] target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOp, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 37/60] target-i386: Change dflag to TCGMemOp, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 38/60] target-i386: Tidy addr16 code in gen_lea_modrm, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 39/60] target-i386: Combine gen_push_T* into gen_push_v, Richard Henderson, 2013/11/28
- [Qemu-devel] [PATCH v2 40/60] target_i386: Clean up gen_pop_T0, Richard Henderson, 2013/11/28