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Re: [Qemu-devel] [RFC PATCH 04/21] target-arm: preserve RAO/WI bits of A
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [RFC PATCH 04/21] target-arm: preserve RAO/WI bits of ARMv7 SCTLR |
Date: |
Tue, 3 Dec 2013 22:17:26 +1000 |
On Tue, Dec 3, 2013 at 6:48 PM, Sergey Fedorov <address@hidden> wrote:
> From: Svetlana Fedoseeva <address@hidden>
>
> Signed-off-by: Svetlana Fedoseeva <address@hidden>
> Signed-off-by: Sergey Fedorov <address@hidden>
> ---
> target-arm/helper.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 6642e53..d7922ad 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1507,6 +1507,10 @@ static const ARMCPRegInfo lpae_cp_reginfo[] = {
>
> static int sctlr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t
> value)
> {
> + if (arm_feature(env, ARM_FEATURE_V7)) {
> + value = value | 0x00c50078; /* This bits are RAO/WI */
Magic number. "these bits ".
> + }
> +
> env->cp15.c1_sys = value;
> /* ??? Lots of these bits are not implemented. */
> /* This may enable/disable the MMU, so do a TLB flush. */
> --
> 1.7.9.5
>
>
[Qemu-devel] [RFC PATCH 09/21] target-arm: adjust SCR CP15 register access rights, Sergey Fedorov, 2013/12/03
[Qemu-devel] [RFC PATCH 14/21] target-arm: split TLB for secure state, Sergey Fedorov, 2013/12/03