[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 07/12] target-arm: A64: expand decoding skeleton
From: |
Christopher Covington |
Subject: |
Re: [Qemu-devel] [PATCH 07/12] target-arm: A64: expand decoding skeleton for system instructions |
Date: |
Tue, 03 Dec 2013 18:15:13 -0500 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130106 Thunderbird/17.0.2 |
Hi Claudio, Peter,
On 12/03/2013 04:51 PM, Peter Maydell wrote:
> From: Claudio Fontana <address@hidden>
>
> Decode the various kinds of system instructions:
> hints (HINT), which include NOP, YIELD, WFE, WFI, SEV, SEL
> sync instructions, which include CLREX, DSB, DMB, ISB
> msr_i, which move immediate to processor state field
> sys, which include all SYS and SYSL instructions
> msr, which move from a gp register to a system register
> mrs, which move from a system register to a gp register
>
> Provide implementations where they are trivial nops.
>
> Signed-off-by: Claudio Fontana <address@hidden>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target-arm/translate-a64.c | 130
> +++++++++++++++++++++++++++++++++++++++++++-
[...]
> +/* C3.2.4 System */
> +static void disas_system(DisasContext *s, uint32_t insn)
> +{
> + /*
> + * 31 30 29 28 27 26 25 24 23 22 21 20 19 18 16 15 12 11 8 7 5 4
> 0
> + * 1 1 0 1 0 1 0 1 0 0 L op0 op1 CRn CRm op2
> Rt
> + */
[...]
Could this opcode legend get a pretty box like the others?
Thanks,
Christopher
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, (continued)
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, Richard Henderson, 2013/12/03
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, Peter Maydell, 2013/12/03
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, Richard Henderson, 2013/12/03
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, Peter Maydell, 2013/12/04
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, Peter Maydell, 2013/12/04
- Re: [Qemu-devel] [PATCH 12/12] target-arm: A64: add support for compare and branch imm, Richard Henderson, 2013/12/04
[Qemu-devel] [PATCH 08/12] target-arm: A64: add support for B and BL insns, Peter Maydell, 2013/12/03
[Qemu-devel] [PATCH 09/12] target-arm: A64: add support for BR, BLR and RET insns, Peter Maydell, 2013/12/03
[Qemu-devel] [PATCH 07/12] target-arm: A64: expand decoding skeleton for system instructions, Peter Maydell, 2013/12/03
[Qemu-devel] [PATCH 06/12] target-arm: A64: provide skeleton for a64 insn decoding, Peter Maydell, 2013/12/03