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[Qemu-devel] [PATCH arm-devs v2 12/14] net/cadence_gem: Fix register w1c
From: |
Peter Crosthwaite |
Subject: |
[Qemu-devel] [PATCH arm-devs v2 12/14] net/cadence_gem: Fix register w1c logic |
Date: |
Tue, 3 Dec 2013 22:00:54 -0800 |
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether the written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.
Signed-off-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
---
hw/net/cadence_gem.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 1619507..f2c734e 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -1112,15 +1112,14 @@ static void gem_write(void *opaque, hwaddr offset,
uint64_t val,
/* Squash bits which are read only in write value */
val &= ~(s->regs_ro[offset]);
- /* Preserve (only) bits which are read only in register */
- readonly = s->regs[offset];
- readonly &= s->regs_ro[offset];
-
- /* Squash bits which are write 1 to clear */
- val &= ~(s->regs_w1c[offset] & val);
+ /* Preserve (only) bits which are read only and wtc in register */
+ readonly = s->regs[offset] & (s->regs_ro[offset] | s->regs_w1c[offset]);
/* Copy register write to backing store */
- s->regs[offset] = val | readonly;
+ s->regs[offset] = (val & ~s->regs_w1c[offset]) | readonly;
+
+ /* do w1c */
+ s->regs[offset] &= ~(s->regs_w1c[offset] & val);
/* Handle register write side effects */
switch (offset) {
--
1.8.4.4
- [Qemu-devel] [PATCH arm-devs v2 00/14] Cadence GEM Bugfixes and missing features, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 01/14] net/cadence_gem: Implement mac level loopback mode, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 02/14] net/cadence_gem: Update DMA rx descriptors as we process them, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 03/14] net/cadence_gem: Don't assert against 0 buffer address, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 04/14] net/cadence_gem: simplify rx buf descriptor walking, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 06/14] net/cadence_gem: Implement RX descriptor match mode flags, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 07/14] net/cadence_gem: Implement SAR match bit in rx desc, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 08/14] net/cadence_gem: Implement SAR (de)activation, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 11/14] net/cadence_gem: Fix small packet FCS stripping, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 12/14] net/cadence_gem: Fix register w1c logic,
Peter Crosthwaite <=
- [Qemu-devel] [PATCH arm-devs v2 13/14] net/cadence_gem: Improve can_receive debug printfery, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 10/14] net/cadence_gem: Fix rx multi-fragment packets, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 09/14] net/cadence_gem: Add missing VMSTATE_END_OF_LIST, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 14/14] net/cadence_gem: Don't rx packets when no rx buffer available, Peter Crosthwaite, 2013/12/04
- [Qemu-devel] [PATCH arm-devs v2 05/14] net/cadence_gem: Prefetch rx descriptors ASAP, Peter Crosthwaite, 2013/12/04
- Re: [Qemu-devel] [PATCH arm-devs v2 00/14] Cadence GEM Bugfixes and missing features, Peter Maydell, 2013/12/06