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Re: [Qemu-devel] [RFC v5 2/5] hw/arm/digic: prepare DIGIC-based boards s
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [RFC v5 2/5] hw/arm/digic: prepare DIGIC-based boards support |
Date: |
Wed, 4 Dec 2013 20:29:05 +0000 |
On 4 December 2013 20:22, Antony Pavlov <address@hidden> wrote:
> Here is my proposition:
>
> 1. qemu board code setup CPU to start from 0xFFFF0000. (0xffff0000 is a ROM
> address
> on DIGIC chips)
Sort of. What we need is:
1a. Add a "hivecs" property to the ARM CPU object (which
just sets env->cp15.c1_sys bit 13)
(this is about half a dozen lines of code max)
1b DIGIC board init code creates the CPU and sets the hivecs property on it
(another handful of lines of code)
> 2. we need somehow put a 'jump-to-beginning-of-ROM' instruction to 0xffff0000.
> (We can't put barebox to 0xffff0000 as barebox image is bigger that 64K.)
>
> There is at least two possibilities to do so:
> * we can use specially prepared ROM image;
> * qemu board code can insert by itself a 'jump-to-beginning-of-ROM'
> instruction
> after loading ROM image (as qemu MIPS Malta board code does).
The board code should definitely not be writing random instructions into
memory. You need to provide a ROM image which will do the work.
> 3. CPU starts as usual. Branching to barebox code in ROM happends in a
> natural way!
This bit's OK :-)
thanks
-- PMM
[Qemu-devel] [RFC 0/2] ARM: make possible to use high vectors for reset exception, Antony Pavlov, 2013/12/06