Re: [Qemu-devel] [PATCH v2 08/12] target-arm: A64: add support for B and BL insns

[Peter Maydell]

On 4 December 2013 21:55, Richard Henderson <address@hidden> wrote:
> On 12/05/2013 08:33 AM, Peter Maydell wrote:
>> @@ -680,6 +720,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
>>      dc->condjmp = 0;
>>
>>      dc->aarch64 = 1;
>> +    dc->tmp_a64_count = 0;
>>      dc->thumb = 0;
>>      dc->bswap_code = 0;
>>      dc->condexec_mask = 0;
>
> Still no initialization of ->tmp_a64[]?

It doesn't need initialization, does it? It's a static array, and we
fill it as new temps are requested. So all we need to do is clear
the count so it starts "empty". Or have I missed something?

thanks
-- PMM