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Re: [Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src da
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From: |
Richard Henderson |
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Subject: |
Re: [Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src data processing and DIV |
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Date: |
Fri, 06 Dec 2013 11:51:23 +1300 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.1.0 |
On 12/06/2013 10:51 AM, Peter Maydell wrote:
> + switch (opcode) {
> + case 2: /* UDIV */
> + handle_div(s, FALSE, sf, rm, rn, rd);
> + break;
> + case 3: /* SDIV */
> + handle_div(s, TRUE, sf, rm, rn, rd);
> + break;
What are these all-caps TRUE/FALSE? stdbool.h uses lower-case.
Otherwise,
Reviewed-by: Richard Henderson <address@hidden>
r~
[Qemu-devel] [PATCH 11/13] host-utils: add clrsb32/64 - count leading redundant sign bits, Peter Maydell, 2013/12/05
[Qemu-devel] [PATCH 07/13] target-arm: A64: add support for 1-src data processing and CLZ, Peter Maydell, 2013/12/05
[Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src data processing and DIV, Peter Maydell, 2013/12/05
- Re: [Qemu-devel] [PATCH 05/13] target-arm: A64: add support for 2-src data processing and DIV,
Richard Henderson <=
[Qemu-devel] [PATCH 03/13] target-arm: A64: add support for ADR and ADRP, Peter Maydell, 2013/12/05
[Qemu-devel] [PATCH 06/13] target-arm: A64: add support for 2-src shift reg insns, Peter Maydell, 2013/12/05
[Qemu-devel] [PATCH 02/13] target-arm: A64: add support for logical (shifted register), Peter Maydell, 2013/12/05