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Re: [Qemu-devel] [PATCH] target-arm: Use new qemu_ld/st opcodes
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH] target-arm: Use new qemu_ld/st opcodes |
Date: |
Sat, 7 Dec 2013 20:17:23 +0000 |
On 7 December 2013 00:34, Richard Henderson <address@hidden> wrote:
> Retain the existing gen_aa32_* inlines, to aid compilation for A64.
> -#define DO_GEN_LD(OP) \
> -static inline void gen_aa32_##OP(TCGv_i32 val, TCGv_i32 addr, int index) \
> +#define DO_GEN_LD(SUFF, OPC) \
> +static inline void gen_aa32_ld##SUFF(TCGv_i32 val, TCGv_i32 addr, int index)
> \
> { \
> TCGv addr64 = tcg_temp_new(); \
> - TCGv val64 = tcg_temp_new(); \
> tcg_gen_extu_i32_i64(addr64, addr); \
> - tcg_gen_qemu_##OP(val64, addr64, index); \
> - tcg_temp_free(addr64); \
> - tcg_gen_trunc_i64_i32(val, val64); \
> - tcg_temp_free(val64); \
> + tcg_gen_qemu_ld_i32(val, addr64, index, OPC); \
> }
This seems to have lost the free of addr64.
thanks
-- PMM