Re: [Qemu-devel] [RFC 2/2] ARM: arm_cpu_reset: make possible to use high vectors for reset_exc

[Antony Pavlov]

On Sat, 7 Dec 2013 11:08:40 +1000
Peter Crosthwaite <address@hidden> wrote:

> On Sat, Dec 7, 2013 at 10:55 AM, Antony Pavlov <address@hidden> wrote:
> > Signed-off-by: Antony Pavlov <address@hidden>
> > ---
> >  target-arm/cpu.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/target-arm/cpu.c b/target-arm/cpu.c
> > index f838499..6f548c7 100644
> > --- a/target-arm/cpu.c
> > +++ b/target-arm/cpu.c
> > @@ -126,6 +126,10 @@ static void arm_cpu_reset(CPUState *s)
> >              env->cp15.c1_sys = c1_sys | (1 << 13);
> >      }
> >
> > +    if (!IS_M(env) && env->cp15.c1_sys & (1 << 13)) {
> > +            env->regs[15] = 0xFFFF0000;
> 
> Dont see the need for the second if. This should only be reachable if
> reset_hivecs == true. Can you just put this line after the above
> "env->cp15.c1_sys = c1_sys | (1 << 13);" ?

Here we have a small problem.
On the one hand we have 'reset_hivecs' property, on the other hand we have 
c1_sys[13].

What we have to do if during reset c1_sys[13] == 1 and 'reset_hivecs' is not 
set?

Also if c1_sys[13] == 0, but 'reset_hivecs' is set IMHO we have to set 
c1_sys[13] = 1.


> With the change I suggested in P1, the reset_hivecs variable wont be a
> property of M CPUs so it will be impossible for an M to have
> rest_hivecs regardless of board code (mis)behaviour. So I think you
> are safe to drop the IS_M here.
> 
> Regards,
> Peter
> 
> > +    }
> > +
> >      env->vfp.xregs[ARM_VFP_FPEXC] = 0;
> >  #endif
> >      set_flush_to_zero(1, &env->vfp.standard_fp_status);
> > --
> > 1.8.5
> >
> >


-- 
-- 
Best regards,
  Antony Pavlov