Re: [Qemu-devel] [PATCH 9/9] target-arm: A64: implement SVC, BRK

[Peter Maydell]

On 9 December 2013 21:58, Richard Henderson <address@hidden> wrote:
> On 12/09/2013 10:12 AM, Peter Maydell wrote:
>> +    case 0:
>> +        /* SVC, HVC, SMC; since we don't support the Virtualization
>> +         * or TrustZone extensions these all UNDEF except SVC.
>> +         */
>> +        if (op2_ll != 1) {
>> +            unallocated_encoding(s);
>> +            break;
>> +        }
>> +        gen_exception_insn(s, 0, EXCP_SWI);
>> +        break;
>
> Should the imm16 should be stored somewhere, for exception.syndrome?
>
> I can only presume from this that the AA64 userland doesn't encode its syscall
> number in the insn...

It doesn't; it goes in X8 (we already have the aarch64 cpu_loop() in
linux-user/main.c). I thought about adding a comment about the
syndrome register, but decided against on the basis that for the
system emulation work we're going to have to update every point
where we take an exception to record syndrome information,
and this one didn't seem special enough to be worth noting.

thanks
-- PMM