[Qemu-devel] [PATCH v2 0/8] target-arm: A64 decoder set 3: loads, stores, misc integer

[Peter Maydell]

Here's version 2 of the third set of A64 decoder patches
(loads, stores, misc integer).

Changes v1->v2:
 * merged ldp and stp into one function/patch
 * minor cleanup as per RTH review
 * use the new tcg ops for guest load/store
 * catch the missing UNALLOCATED cases for load/store
 * add missing returns after unallocated_encoding() calls
   in vector load/store decode
 * use tcg ops for mul[su]h

thanks
-- PMM

Alex Bennée (6):
  target-arm: A64: add support for ld/st pair
  target-arm: A64: add support for ld/st unsigned imm
  target-arm: A64: add support for ld/st with reg offset
  target-arm: A64: add support for ld/st with index
  target-arm: A64: add support for add, addi, sub, subi
  target-arm: A64: add support for move wide instructions

Alexander Graf (2):
  target-arm: A64: add support for 3 src data proc insns
  target-arm: A64: implement SVC, BRK

 target-arm/translate-a64.c | 1114 +++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 1092 insertions(+), 22 deletions(-)

-- 
1.8.5