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Re: [Qemu-devel] [RFC PATCH 06/21] target-arm: add arm_is_secure() helpe
From: |
Peter Crosthwaite |
Subject: |
Re: [Qemu-devel] [RFC PATCH 06/21] target-arm: add arm_is_secure() helper |
Date: |
Thu, 19 Dec 2013 13:31:19 +1000 |
On Tue, Dec 3, 2013 at 6:48 PM, Sergey Fedorov <address@hidden> wrote:
> arm_is_secure() helper allows to determine CPU security state.
>
Helper in the target-foo context usually refers to a TCG->C code
helper fn, whereas you are using in a general sense. Just
s/helper/function.
> Signed-off-by: Sergey Fedorov <address@hidden>
> ---
> target-arm/cpu.h | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/target-arm/cpu.h b/target-arm/cpu.h
> index 94d8bd1..a00c86f 100644
> --- a/target-arm/cpu.h
> +++ b/target-arm/cpu.h
> @@ -474,6 +474,17 @@ static inline int arm_feature(CPUARMState *env, int
> feature)
> return (env->features & (1ULL << feature)) != 0;
> }
>
> +/* Return non-zero if the processor is in Secure state */
"Return true"
Regards,
Peter
> +static inline bool arm_is_secure(CPUARMState *env)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> + return ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_MON) ||
> + !(env->cp15.c1_scr & 1);
> +#else
> + return false;
> +#endif
> +}
> +
> void arm_cpu_list(FILE *f, fprintf_function cpu_fprintf);
>
> /* Interface between CPU and Interrupt controller. */
> --
> 1.7.9.5
>
>
- Re: [Qemu-devel] [RFC PATCH 17/21] target-arm: use c13_context field for CONTEXTIDR, (continued)
- [Qemu-devel] [RFC PATCH 12/21] target-arm: add NSACR support, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 18/21] target-arm: switch banked CP registers, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 15/21] target-arm: add banked coprocessor register type, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 16/21] target-arm: convert appropriate coprocessor registers to banked type, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 13/21] target-arm: add SDER definition, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 02/21] target-arm: move SCR & VBAR into TrustZone register list, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 06/21] target-arm: add arm_is_secure() helper, Sergey Fedorov, 2013/12/03
- Re: [Qemu-devel] [RFC PATCH 06/21] target-arm: add arm_is_secure() helper,
Peter Crosthwaite <=
- [Qemu-devel] [RFC PATCH 20/21] target-arm: implement SMC instruction, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 19/21] target-arm: add MVBAR support, Sergey Fedorov, 2013/12/03
- [Qemu-devel] [RFC PATCH 21/21] target-arm: implement IRQ/FIQ routing to Monitor mode, Sergey Fedorov, 2013/12/03
- Re: [Qemu-devel] [RFC PATCH 00/21] target-arm: add CPU core TrustZone support, Fedorov Sergey, 2013/12/04